DS90C187_14 Datasheet, PDF (2/28 Pages) Texas Instruments – Low Power 1.8V Dual Pixel FPD-Link (LVDS) Serializer

DS90C187
SNLS401B – FEBRUARY 2012 – REVISED APRIL 2013
Typical Application Diagram
1.8V LVCMOS
(24 bit RGB + HS/VS/DE)
1.8V
2 Channels FPD-Link (LVDS)
(4 Data + Clock)
GPU
DS90C187
SER
Single Pixel
R[7:0] G[7:0]
B[7:0]
HS
VS
DE
GPO/CNTL (L/R)
PCLK
PDB
L
A
T
C
H
&
P
2
S
PLL
Display (TCON)
LVDS
4D+C
(odd pixel)
LVDS
4D+C
(even pixel)
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Figure 1. Single Pixel In Dual Pixel Out (SIDO) Mode
Functional Block Diagrams
LVCMOS INPUTS
RED
INA[27:21],
INA[17:0]
GREEN
BLUE
CNTRL (L/R)
HS
VS
DE
DATA (LVDS)
IN_CLK
PLL
CLOCK (LVDS)
PDB
18B
VODSEL
RFB
MODE0
MODE1
DS90C187 ± SERIALIZER
Single Pixel In / Single Pixel Out
(SISO)
2
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