TL16C450_09 Datasheet, PDF (18/27 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT

TL16C450
ASYNCHRONOUS COMMUNICATIONS ELEMENT
SLLS037C − MARCH 1988 − REVISED JANUARY 2006
PRINCIPLES OF OPERATION
interrupt identification register (IIR) (continued)
INTERRUPT
IDENTIFICATION
REGISTER
BIT 2
BIT 1
BIT 0
0
0
1
1
1
0
1
0
0
0
1
0
0
0
0
Table 4. Interrupt Control Functions
PRIORITY
LEVEL
INTERRUPT TYPE
None
None
1
Receiver line status
2
Received data available
INTERRUPT SOURCE
None
Overrun error, parity error,
framing error or break
interrupt
Receiver data available
3
Transmitter holding register Transmitter holding register
empty
empty
4
Modem status
Clear to send, data set
ready, ring indicator, or data
carrier detect
INTERRUPT RESET
METHOD
−
Reading the line status
register
Reading the receiver buffer
Buffer register
Reading the interrupt
identification register (if
source of interrupt) or writing
into the transmitter holding
register
Reading the modem status
register
line control register (LCR)
The system programmer controls the format of the asynchronous data communication exchange through the
LCR. In addition, the programmer is able to retrieve, inspect, and modify the contents of the LCR; this eliminates
the need for separate storage of the line characteristics in system memory. The contents of this register are
summarized in Table 3 and are described in the following bulleted list.
D Bits 0 and 1: These two bits specify the number of bits in each transmitted or received serial character.
These bits are encoded as shown in Table 5.
Table 5. Serial Character Word Length
Bit 1
0
0
1
1
Bit 0
0
1
0
1
Word Length
5 Bits
6 Bits
7 Bits
8 Bits
D Bit 2: This bit specifies either one, one and one-half, or two stop bits in each transmitted character. When
bit 2 is cleared, one stop bit is generated in the data. When bit 2 is set, the number of stop bits generated
is dependent on the word length selected with bits 0 and 1. The receiver checks the first stop bit only,
regardless of the number of stop bits selected. The number of stop bits generated, in relation to word length
and bit 2, is shown in Table 6.
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