TM4C1299NCZAD Datasheet, PDF (1721/2017 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1299NCZAD Microcontroller
Register 15: LCD Raster Subpanel Display 2 (LCDRASTRSUBP2), offset 0x03C
Note that subpictures are only allowed for Active Matrix mode (LCDTFT=1) in LCDRASTRCTL
LCD Raster Subpanel Display 2 (LCDRASTRSUBP2)
Base 0x4405.0000
Offset 0x03C
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
LPPTMSB
DPDMSB
Type RO
RO
RO
RO
RO
RO
RO
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:9
8
7:0
Name
reserved
LPPTMSB
DPDMSB
Type
RO
RW
RW
Reset Description
0x0000.00 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
Lines Per Panel Threshold Bit 10
This register is Bit 10 of the LPPT field in LCDRASTRSUBP1.
0x00
Default Pixel Data MSB [23:16]
DPD defines the default value of the pixel data sent to the panel for the
lines until LPPT is reached or after passing the LPPT.
June 18, 2014
Texas Instruments-Production Data
1721