TM4C1299NCZAD Datasheet, PDF (11/2017 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1299NCZAD Microcontroller
24.3.4 PWM Signal Generator .............................................................................................. 1765
24.3.5 Dead-Band Generator ............................................................................................... 1766
24.3.6 Interrupt/ADC-Trigger Selector ................................................................................... 1766
24.3.7 Synchronization Methods .......................................................................................... 1767
24.3.8 Fault Conditions ........................................................................................................ 1768
24.3.9 Output Control Block .................................................................................................. 1769
24.4 Initialization and Configuration .................................................................................... 1769
24.5 Register Map ............................................................................................................ 1770
24.6 Register Descriptions ................................................................................................. 1773
25 Quadrature Encoder Interface (QEI) ................................................................. 1839
25.1 Block Diagram ........................................................................................................... 1839
25.2 Signal Description ..................................................................................................... 1841
25.3 Functional Description ............................................................................................... 1841
25.4 Initialization and Configuration .................................................................................... 1844
25.5 Register Map ............................................................................................................ 1844
25.6 Register Descriptions ................................................................................................. 1845
26 Pin Diagram ........................................................................................................ 1862
27 Signal Tables ...................................................................................................... 1863
27.1 Signals by Pin Number .............................................................................................. 1864
27.2 Signals by Signal Name ............................................................................................. 1882
27.3 Signals by Function, Except for GPIO ......................................................................... 1899
27.4 GPIO Pins and Alternate Functions ............................................................................ 1914
27.5 Possible Pin Assignments for Alternate Functions ....................................................... 1919
27.6 Connections for Unused Signals ................................................................................. 1926
28 Electrical Characteristics .................................................................................. 1928
28.1 Maximum Ratings ...................................................................................................... 1928
28.2 Operating Characteristics ........................................................................................... 1929
28.3 Recommended Operating Conditions ......................................................................... 1930
28.3.1 DC Operating Conditions ........................................................................................... 1930
28.3.2 Recommended GPIO Operating Characteristics .......................................................... 1930
28.4 Load Conditions ........................................................................................................ 1933
28.5 JTAG and Boundary Scan .......................................................................................... 1934
28.6 Power and Brown-Out ............................................................................................... 1936
28.6.1 V_DDA Levels .............................................................................................................. 1936
28.6.2 V_DD Levels ................................................................................................................ 1937
28.6.3 V_DDC Levels .............................................................................................................. 1938
28.6.4 Response ................................................................................................................. 1939
28.7 Reset ........................................................................................................................ 1941
28.8 On-Chip Low Drop-Out (LDO) Regulator ..................................................................... 1944
28.9 Clocks ...................................................................................................................... 1945
28.9.1 PLL Specifications ..................................................................................................... 1945
28.9.2 PIOSC Specifications ................................................................................................ 1947
28.9.3 Low-Frequency Internal Oscillator Specifications ......................................................... 1947
28.9.4 Hibernation Clock Source Specifications ..................................................................... 1947
28.9.5 Main Oscillator Specifications ..................................................................................... 1948
28.9.6 System Clock Specification with ADC Operation .......................................................... 1952
28.9.7 System Clock Specification with USB Operation .......................................................... 1952
June 18, 2014
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Texas Instruments-Production Data