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CC2564C Datasheet, PDF (17/52 Pages) Texas Instruments – CC2564C Dual-Mode Bluetooth Controller
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CC2564C
SWRS199A – APRIL 2016 – REVISED NOVEMBER 2016
Figure 5-3 shows the UART data frame.
tb
TX
STR
D0
D1
D2
Dn
Figure 5-3. Data Frame
Table 5-4 describes the symbols used in Figure 5-3.
PAR STP
td_uart_swrs064
Table 5-4. Data Frame Key
SYMBOL
STR
D0...Dn
PAR
STP
DESCRIPTION
Start bit
Data bits (LSB first)
Parity bit (optional)
Stop bit
5.8.3.2 PCM
Figure 5-4 shows the interface timing for the PCM.
Tclk
Tw
Tw
AUD_CLK
tis
tih
AUD_IN / FSYNC_IN
top
AUD_OUT / FSYNC_OUT
Figure 5-4. PCM Interface Timing
Table 5-5 lists the associated PCM master parameters.
SYMBOL
tclk
tw
tis
tih
top
top
PARAMETER
Cycle time
High or low pulse width
AUD_IN setup time
AUD_IN hold time
AUD_OUT propagation time
FSYNC_OUT propagation time
Table 5-5. PCM Master
CONDITION
40-pF load
40-pF load
MIN
244.14
(4.096 MHz)
50% of Tclk min
25
0
0
0
td_aud_swrs064
MAX
15625
(64 kHz)
10
10
UNIT
ns
ns
ns
ns
ns
ns
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Specifications
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