TMS320DM647_17 Datasheet, PDF (161/191 Pages) Texas Instruments – Digital Media Processor

www.ti.com
9
AHCLKR/X (Falling Edge Polarity)
AHCLKR/X (Rising Edge Polarity)
11
ACLKR/X (CLKRP = CLKXP = 1) ^(A)
ACLKR/X (CLKRP = CLKXP = 0) ^(B)
AFSR/X (Bit Width, 0 Bit Delay)
10
10
12
12
13
13
TMS320DM647
TMS320DM648
SPRS372H – MAY 2007 – REVISED APRIL 2012
13
13
AFSR/X (Bit Width, 1 Bit Delay)
AFSR/X (Bit Width, 2 Bit Delay)
13
AFSR/X (Slot Width, 0 Bit Delay)
13
13
AFSR/X (Slot Width, 1 Bit Delay)
AFSR/X (Slot Width, 2 Bit Delay)
14
15
AXR[n] (Data Out/T ransmit)
A0 A1
A30 A31 B0 B1
B30 B31 C0 C1 C2 C3
C31
A. For CLKRP = CLKXP = 1, the McASP transmitter is configured for falling edge (to shift data out) and the McASP
receiver is configured for rising edge (to shift data in).
B. For CLKRP = CLKXP = 0, the McASP transmitter is configured for rising edge (to shift data out) and the McASP
receiver is configured for falling edge (to shift data in).
Figure 6-50. McASP Output Timing
Copyright © 2007–2012, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 161
Submit Documentation Feedback
Product Folder Link(s): TMS320DM647 TMS320DM648