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TMS320DM647_17 Datasheet, PDF (118/191 Pages) Texas Instruments – Digital Media Processor
TMS320DM647
TMS320DM648
SPRS372H – MAY 2007 – REVISED APRIL 2012
www.ti.com
6.11 Video Port
Each video port is capable of sending and receiving digital video data. The video ports are also capable of
capturing/displaying RAW data. The video port peripherals follow video standards such as BT.656 and
SMPTE296.
6.11.1 Video Port Device-Specific Information
The devices have five video port peripherals.
The video port peripheral can operate as a video capture port, video display port, or as a transport
channel interface (TCI) capture port.
The port consists of two channels: A and B. A 5120-byte capture/display buffer is splittable between the
two channels. The entire port (both channels) is always configured for either video capture or display only.
Separate data pipelines control the parsing and formatting of video capture or display data for each of the
BT.656, Y/C, raw video, and TCI modes.
For video capture operation, the video port may operate as two 8-bit channels of BT.656 or raw video
capture; or as a single channel of 8-bit BT.656, 8-bit raw video, 8-bit Y/C video, 16-bit raw video, or 8-bit
TCI.
For video display operation, the video port may operate as a single channel of 8-bit BT.656; or as a single
channel of 8-bit BT.656, 8-bit raw video, 8-bit Y/C video, or 16-bit raw video. It may also operate in a two
channel 8-bit raw mode in which the two channels are locked to the same timing. Channel B is not used
during single channel operation.
For more detailed information on the video port peripherals, see the TMS320DM647/DM648 Video Port
User's Guide (literature number SPRUEM1).
6.11.2 Video Port Peripheral Register Description(s)
Table 6-48. Video Port 0, 1, 2, 3, and 4 (VP0, VP1, VP2, VP3, and VP4) Control Registers
VP0
0x02C0 0000
0x02C0 0004
0x02C0 0008
0x02C0 000C
0x02C0 0020
0x02C0 0024
0x02C0 0028
0x02C0 002C
0x02C0 0030
0x02C0 0034
0x02C0 0038
0x02C0 003C
0x02C0 0040
0x02C0 0044
0x02C0 00C0
0x02C0 00C4
0x02C0 00C8
0x02C0 00CC
0x02C0 0100
0x02C0 0104
HEX ADDRESS RANGE
VP1
VP2
VP3
0x02C0 4000
0x02C0 8000
0x02C0 C000
0x02C0 4004
0x02C0 4008
0x02C0 400C
0x02C0 4020
0x02C0 4024
0x02C0 4028
0x02C0 402C
0x02C0 4030
0x02C0 4034
0x02C0 4038
0x02C0 403C
0x02C0 4040
0x02C0 4044
0x02C0 40C0
0x02C0 40C4
0x02C0 40C8
0x02C0 40CC
0x02C0 4100
0x02C0 8004
0x02C0 8008
0x02C0 800C
0x02C0 8020
0x02C0 8024
0x02C0 8028
0x02C0 802C
0x02C0 8030
0x02C0 8034
0x02C0 8038
0x02C0 803C
0x02C0 8040
0x02C0 8044
0x02C0 80C0
0x02C0 80C4
0x02C0 80C8
0x02C0 80CC
0x02C0 8100
0x02C0 C004
0x02C0 C008
0x02C0 C00C
0x02C0 C020
0x02C0 C024
0x02C0 C028
0x02C0 C02C
0x02C0 C030
0x02C0 C034
0x02C0 C038
0x02C0 C03C
0x02C0 C040
0x02C0 C044
0x02C0 C0C0
0x02C0 C0C4
0x02C0 C0C8
0x02C0 C0CC
0x02C0 C100
0x02C0 4104
0x02C0 8104
0x02C0 C104
VP4
0x02C1 0000
0x02C1 0004
0x02C1 0008
0x02C1 000C
0x02C1 0020
0x02C1 0024
0x02C1 0028
0x02C1 002C
0x02C1 0030
0x02C1 0034
0x02C1 0038
0x02C1 003C
0x02C1 0040
0x02C1 0044
0x02C1 00C0
0x02C1 00C4
0x02C1 00C8
0x02C1 00CC
0x02C1 0100
0x02C1 0104
ACRONYM
VPPID
PCR
-
-
PFUNC
PDIR
PDIN
PDOUT
PDSET
PDCLR
PIEN
PIPOL
PISTAT
PICLR
VPCTL
VPSTAT
VPIE
VPIS
VCASTAT
VCACTL
DESCRIPTION
Video Port Peripheral Identification
Register
Video Port Peripheral Control Register
Reserved
Reserved
Video Port Pin Function Register
Video Port Pin Direction Register
Video Port Pin Data Input Register
Video Port Pin Data Output Register
Video Port Pin Data Set Register
Video Port Pin Data Clear Register
Video Port Pin Interrupt Enable Register
Video Port Pin Interrupt Polarity Register
Video Port Pin Interrupt Status Register
Video Port Pin Interrupt Clear Register
Video Port Control Register
Video Port Status Register
Video Port Interrupt Enable Register
Video Port interrupt Status Register
Video Capture Channel A Status Register
Video Capture Channel A Control
Register
118 Peripheral Information and Electrical Specifications
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