TCM29C23_12 Datasheet, PDF (14/20 Pages) Texas Instruments – VARIABLE-FREQUENCY PCM OR DSP INTERFACE

TCM29C23, TCM129C23
VARIABLE-FREQUENCY PCM OR DSP INTERFACE
SCTS029B − AUGUST 1989 − REVISED NOVEMBER 1996
PARAMETER MEASUREMENT INFORMATION
Time Slot
FSX
DCLKX
CLKX
t_pd8
PCM OUT
t_d(TSDX)
1
2
3
4
5
6
7
8
t_d(FSX)
t_pd10
Bit 1^†
Bit 2
Bit 3
t_pd7
Bit 4
Bit 5
Bit 6
t_pd9
Bit 7
Bit 8^†
† _{Bit 1 = MSB = sign bit and locked in first on the PCM IN or clocked out first on PCM OUT. Bit 8 = LSB = least significant bit and is clocked}
in last on PCM IN or is clocked out last on PCM OUT.
NOTE A: IAll timing parameters referenced to V_IH and V_IL except t_pd7 and t_pd8, which reference the high-impedance state.
Figure 5. Transmit Timing (Variable-Data Rate)
FSR
t_d(TSDR)
DCLKR
1
2
t_d(FSR)
CLKR
t_{su(PCM IN)}
PCM IN Don’t Care
Bit 1^†
Bit 2
3
Bit 3
4
5
6
t_{h(PCM IN)}
Bit 4
Bit 5
Bit 6
7
8
t_(SER)
Bit 7
Bit 8^†
† _{Bit 1 = MSB = sign bit and locked in first on the PCM IN or clocked out first on PCM OUT. Bit 8 = LSB = least significant bit and is clocked}
in last on PCM IN or is clocked out last on PCM OUT.
NOTE A: All timing parameters referenced to V_IH and V_IL except t_pd7 and t_pd8, which reference the high-impedance state.
Figure 6. Receive Timing (Variable-Data Rate)
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