TMS320DM643AZDK5 Datasheet, PDF (139/164 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processor

TMS320DM643
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SPRS269D – FEBRUARY 2005 – REVISED OCTOBER 2010
5.14.3 VIC Electrical Data/Timing
5.14.3.1 STCLK Timing
Table 5-59. Timing Requirments for STCLK⁽¹⁾ (see Figure 5-58)
NO.
1 t_c(STCLK)
Cycle time, STCLK
2 t_w(STCLKH) Pulse duration, STCLK high
3 t_w(STCLKL) Pulse duration, STCLK low
4 t_t(STCLK)
Transition time, STCLK
(1) The reference points for the rise and fall transitions are measured at V_IL MAX and V_IH MIN.
1
2
3
–500
–600
MIN MAX
33.3
16
16
3
UNIT
ns
ns
ns
ns
4
STCLK
4
Figure 5-58. STCLK Timing
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DM643 Peripheral Information and Electrical Specifications 139
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