DRV2510-Q1 Datasheet, PDF (13/32 Pages) Texas Instruments – DRV2510-Q1 3-A Automotive Haptic Driver for Solenoids and Voice Coils with Integrated Diagnostics

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Programming (continued)
DRV2510-Q1
SLOS919A – JUNE 2016 – REVISED JUNE 2016
Acknowledge
Acknowledge
Acknowledge
A6 A5 A4 A3 A2 A1 A0 W ACK A7 A6 A5 A4 A3 A2 A0 A1 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK
Start
condition
I²C device address
and R/W bit
Sub addr ess
Figure 9. Single-Byte Write Transfer
Data byte
Stop
condition
7.5.4 Multiple-Byte Write and Incremental Multiple-Byte Write
A multiple-byte data write transfer is identical to a single-byte data write transfer except that multiple data bytes
are transmitted by the master device to the DRV2510-Q1 device as shown in Figure 10. After receiving each
data byte, the DRV2510-Q1 device responds with an acknowledge bit.
Acknowledge
Acknowledge
Acknowledge
Acknowledge
Acknowledge
A1 A0
A1 A0 W ACK A7 A6
A1 A0 ACK D7 D6
D1 D0 ACK D7
D0 ACK D7
D0 ACK
Start
condition
I²C device address
and R/W bit
Sub addr ess
First data byte
Other data bytes
Figure 10. Multiple-Byte Write Transfer
Last data byte
Stop
condition
7.5.5 Single-Byte Read
Figure 11 shows that a single-byte data-read transfer begins with the master device transmitting a start condition
followed by the I²C device address and the read-write bit. For the data-read transfer, both a write followed by a
read actually occur. Initially, a write occurs to transfer the address byte of the internal memory address to be
read. As a result, the read-write bit is set to 0.
After receiving the DRV2510-Q1 address and the read-write bit, the DRV2510-Q1 device responds with an
acknowledge bit. The master then sends the internal memory address byte, after which the device issues an
acknowledge bit. The master device transmits another start condition followed by the DRV2510-Q1 address and
the read-write bit again. On this occasion, the read-write bit is set to 1, indicating a read transfer. Next, the
DRV2510-Q1 device transmits the data byte from the memory address that is read. After receiving the data byte,
the master device transmits a not-acknowledge followed by a stop condition to complete the single-byte data
read transfer. See the note in the General I²C Operation section.
Acknowledge
Acknowledge
Acknowledge
Acknowledge
A6 A5
A1 A0 W ACK A7 A6
A1 A0 ACK
A6 A5
A0 R ACK D7
D0 ACK
Start
Condition
I²C device address and
R/W bit
Subaddress
Repeat start I²C device address and
condition
R/W bit
Figure 11. Single-Byte Read Transfer
Data Byte
Stop
Condition
7.5.6 Multiple-Byte Read
A multiple-byte data-read transfer is identical to a single-byte data-read transfer except that multiple data bytes
are transmitted by the DRV2510-Q1 device to the master device as shown in Figure 12. With the exception of
the last data byte, the master device responds with an acknowledge bit after receiving each data byte.
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