DS50PCI402_14 Datasheet, PDF (12/35 Pages) Texas Instruments – 2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Repeater with Equalization and De-Emphasis

DS50PCI402
SNLS320G – APRIL 2010 – REVISED MAY 2011
www.ti.com
Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges with default register settings unless other specified.
(1) (2)
Symbol
V_{TX-DE-RATIO-3.5}
Parameter
Conditions
Min
Typ
Max
Units
Tx de-emphasis level
ratio
VOD = 1000 mV, DEM1 = GND,
DEM0 = VDD, ⁽¹⁾,
(7)
3.5
dB
V_{TX-DE-RATIO-6}
T_TX-HF-DJ-DD
T_TX-LF-RMS
T_TX-RISE-FALL
Tx de-emphasis level
ratio
VOD = 1000 mV, DEM1 = VDD,
DEM0 = GND, ⁽¹⁾,
(7)
Tx Dj > 1.5 Mhz
(8)
Tx RMS jitter < 1.5Mhz ⁽⁸⁾
Transmitter Rise/ Fall 20% to 80% of differential output
Time
voltage, Figure 4
50
(1) (9)
6
dB
0.15
UI
3.0
ps RMS
67
ps
T_RF-MISMATCH
Tx rise/fall mismatch
20% to 80% of differential output
voltage ^{(1) (9)}
0.01
0.1
UI
RL_TX-DIFF
Differential Output
Return Loss
0.05- 1.25 Ghz, See Figure 7
1.25- 2.5 Ghz, See Figure 7
-23
dB
-20
dB
RL_TX-CM
Common Mode Return 0.05- 2.5 Ghz, See Figure 7
Loss
-11
dB
Z_TX-DIFF-DC
DC differential Tx
impedance
100
Ω
V_TX-CM-AC-PP
Tx AC common mode
voltage
100
mVpp
I_TX-SHORT
transmitter short circuit Total current transmitter can
current limit
supply when shorted to VDD or
GND
90
mA
V_{TX-CM-DC- ACTIVE-IDLE-}
DELTA
Absolute Delta of DC
Common Mode Voltage
during L0 and electrical
Idle
40
mV
V_{TX-CM-DC- LINE-DELTA}
Absolute Delta of DC
Common Mode Voltage
between Tx+ and Tx-
25
mV
T_{TX-IDLE-SET-TO -IDLE}
Max time to transition
to valid diff signaling
after leaving Electrical
Idle
VIN = 800 mVp-p, 5 Gbps,
Figure 6
6.5
9.5
nS
T_{TX-IDLE-TO -DIFF-DATA}
Max time to transition
to valid diff signaling
after leaving Electrical
Idle
VIN = 800 mVp-p, 5 Gbps,
Figure 6
5.5
8
nS
T_PDEQ
Differential Propagation EQ = 11,
Delay
+4.0 dB @ 2.5 GHz , Figure 5
(10)
150
200
250
ps
T_PD
Differential Propagation EQ = FF,
Delay
Equalizer Bypass, Figure 5
120
170
220
ps
(10) (11)
T_LSK
Lane to Lane Skew in a T_A = 25C,V_DD = 2.5V
Single Part
(12) (11)
27
ps
(7) Measured with a repeating K28.5 pattern at a data rate of 2.5 Gbps and 5.0 Gbps.
(8) PCIe 2.0 transmit jitter specifications - actual device jitter is much less. Actual device Rj and Dj has been characterized and specified
with test loads outlined in the EQUALIZATION and DE-EMPHASIS sections of the Electrical Characteristics table.
(9) Guaranteed by device characterization
(10) Propagation Delay measurements will change slightly based on the level of EQ selected. EQ Bypass will result in the shortest
propagation delays.
(11) Propagation Delay measurements for Part to Part skew are all based on devices operating under indentical temperature and supply
voltage conditions.
(12) Guaranteed by device characterization
12
Submit Documentation Feedback
Copyright © 2010–2011, Texas Instruments Incorporated
Product Folder Links: DS50PCI402