LP3910 Datasheet, PDF (11/72 Pages) Texas Instruments – Power Management IC for Hard-Drive-Based Portable Media Players

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LP3910
SNVS481M – NOVEMBER 2006 – REVISED DECEMBER 2015
7.11 Input Electrical Characteristics: USBSUSP, USBISEL
Unless otherwise noted, V_USB = 5 V, V_BATT = 3.6 V, C_BATT = 4.7 µF, C_{CHG_DET} = 10 µF. Minimum and maximum limits apply
over the entire junction temperature range for operation, T_J = 0°C to 125°C.^{(1)(2)(3)(4)(5)}
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V_IL
V_IH
I_LEAKAGE
Input low level
Input high level
Input leakage
0.7 × V_USB
−1
0.3 × V_USB
V
V
1
µA
(1) LDO2EN, BUCK1EN, and USBSUSP have weak internal pulldowns while pins POWERACK, ONOFF do not have weak pulldowns.
(2) All voltages are with respect to the potential at the GND pin.
(3) Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power
dissipation exists, special care must be paid to thermal dissipation issues in board design.
(4) Minimum and maximum limits are specified by design, test, or statistical analysis.
(5) Low ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.
7.12 Input Electrical Characteristics: POWERACK, ONOFF, LDO2EN, BUCK1EN
Unless otherwise noted, V_DD = 5 V, V_BATT = 3.6 V, C_BATT = 4.7 µF, C_{CHG_IN} = 10 µF. Minimum and maximum limits apply over
the entire junction temperature range for operation, T_J = 0°C to 125°C.^{(1)(2)(3)(4)(5)}
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
V_IL
V_IH
I_LEAKAGE
Input low level
Input high level
Input leakage
0.4
V
1.4
V
–1
1
µA
(1) LDO2EN, BUCK1EN, and USBSUSP have weak internal pulldowns, while pins POWERACK, ONOFF do not have this.
(2) All voltages are with respect to the potential at the GND pin.
(3) Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power
dissipation exists, special care must be paid to thermal dissipation issues in board design.
(4) Minimum and maximum limits are specified by design, test, or statistical analysis.
(5) Low ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.
7.13 Electrical Characteristics: LDO1 Low Dropout Linear Regulators
Unless otherwise noted, VIN1 = 3.6 V, I_MAX = 150 mA, V_OUT = default value, C_VDD = 10 µF, C_LDO1 = 1 µF, ESR = 5 mΩ – 500
mΩ, C_VREFH = 100 nF. Typical limits apply for T_J = 25°C; minimum and maximum limits apply for T_J = 0°C to 125°C, unless
otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VIN1
Operational voltage
2.5
6
V
V_OUT Range
Output voltage
programming range
T_J = 25°C
1.2 V to 3.3 V in 100-mV steps
1.2
3.3
V
V_OUT Accuracy Output voltage accuracy
ΔV_OUT
I_SC
V_IN – V_OUT
PSRR
Line regulation
Load regulation
Short-circuit current limit
Dropout voltage
Power supply ripple
rejection
1 mA ≤ I_OUT ≤ I_MAX over full line and
load regulation.
V_OUT = default value
V_IN = (V_OUT + 500 mV) to 5.5 V
Load current = I_MAX
V_IN = 3.6 V,
Load current = 1 mA to I_MAX
V_OUT = 0 V
Load current = I_MAX
F = 10 kHz, load current = I_MAX
–3%
3%
3
mV
10
mV
600
750
mA
60
150
mV
30
dB
R_SHUNT
LDO output impedance LDO disabled, V_OUT = default value
200
Ω
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