DS90C185_13 Datasheet, PDF (10/22 Pages) Texas Instruments – Low Power 1.8V FPD-Link (LVDS) Serializer

DS90C185
SNLS402D – FEBRUARY 2012 – REVISED FEBRUARY 2013
AC Timing Diagrams (continued)
VDD
CLK
PDB
TxCLKOUT
(Diff.)
TPLLS
1.8V
GND
VDD
GND
VDD
GND
(LVDS)
Figure 8. DS90C185 (Transmitter) Phase Lock Loop Set Time
CLK
PDB
50%
TxCLKOUT
(Diff.)
TPDD
Figure 9. Transmitter Power Down Delay
VDD
GND
VDD
GND
(LVDS)
TxCLKOUT
Cycle N
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TxOUT[3:0]+/-
bit 1
bit 0
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
n-1
n-1
n
n
n
n
n
n
n
1UI
2UI
3UI
4UI
5UI
6UI
7UI
Figure 10. Transmitter LVDS Output Pulse Position Measurement - DS90C185
60
55
50
45
40
35
30
25
20
20
VODSEL = L, 18B = L
VODSEL = H, 18B = L
VODSEL = L, 18B = H
VODSEL = H, 18B = H
40 60 80 100 120
FREQUENCY (MHz)
Figure 11. Typ Current Draw — PRBS-7 Data Pattern
10
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