TLK1201IRCPRG4 Datasheet, PDF (9/22 Pages) Texas Instruments – ETHERNET TRANSCEIVERS

RXP, RXN
RD(0−9)
10-Bit Code
t_{d(Rx latency)}
TLK1201RCP, TLK1201IRCP
ETHERNET TRANSCEIVERS
SLLS506E − AUGUST 2001 − REVISED MAY 2007
10-Bit Code
RBC0
Figure 6. Receiver Latency − TBI Normal Mode Shown
loss of signal detection
This device has a loss of signal (LOS) detection circuit for conditions where the incoming signal no longer has
sufficient voltage level to keep the clock recovery circuit in lock. The LOS is intended to be an indication of gross
signal error conditions, such as a detached cable or no signal being transmitted, and not an indication of signal
coding health. Under a PRBS serial input pattern, LOS is high for signal amplitudes greater than 150 mV. The
LOS is low for all amplitudes below 50 mV. Between 50 mV and 150 mV, LOS is undetermined.
testability
The loopback function provides for at-speed testing of the transmit/receive portions of the circuitry. The enable
function allows for all circuitry to be disabled so that an Iddq test can be performed. The PRBS function also
allows for a BIST( built-in self test). The terminal setting, TESTEN high, enables the test mode. The terminal
TESTEN has an internal pulldown resistor, so it defaults to normal operation. The TESTEN is only used for
factory testing, and is not intended for end-user control.
loopback testing
The transceiver can provide a self-test function by enabling (setting LOOPEN to high level) the internal loopback
path. Enabling this function causes serial transmitted data to be routed internally to the receiver. The parallel
data output can be compared to the parallel input data for functional verification. The external differential output
is held in a high-impedance state during the loopback testing.
enable function
When held low, ENABLE disables all quiescent power in both the analog and digital circuitry. This allows an
ultralow-power idle state when the link is not active.
PRBS function
This device has a built-in 2⁷−1 PRBS function. When the PRBSEN control bit is set high, the PRBS test is
enabled. A PRBS is generated and fed into the 10-bit parallel transmitter input bus. Data from the normal parallel
input source is ignored during PRBS test mode. The PRBS pattern is then fed through the transmit circuitry as
if it were normal data and sent out to the transmitter. The output can be sent to a bit error rate tester (BERT)
or to the receiver of another TLK1201I. Since the PRBS is not really random and is really a predetermined
sequence of ones and zeros, the data can be captured and checked for errors by a BERT. This device also has
a built-in BERT function on the receiver side that is enabled by PRBSEN. It can receive a PRBS pattern and
check for errors, and then reports the errors by forcing the SYNC/PASS terminal low. When PRBS is enabled,
RBCMODE is ignored. MODESEL must be low for the PRBS verifier to function correctly. The PRBS testing
supports two modes (normal and latched), which are controlled by the SYNCEN input. When SYNCEN is low,
the result of the PRBS bit error rate test is passed to the SYNC/PASS terminal. When SYNCEN is high the result
of the PRBS verification is latched on the SYNC/PASS output (i.e., a single failure forces SYNC/PASS to remain
low).
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