TLK1201IRCPRG4 Datasheet, PDF (12/22 Pages) Texas Instruments – ETHERNET TRANSCEIVERS

TLK1201RCP, TLK1201IRCP
ETHERNET TRANSCEIVERS
SLLS506E − AUGUST 2001 − REVISED MAY 2007
transmitter/receiver characteristics
V_(cm)
PARAMETER
V_OD = |TxD−TxN|
Transmit common mode voltage range
Receiver input voltage requirement, V_ID = |RxP − RxN|
Receiver common mode voltage range, (RxP +
RxN)/2
TEST CONDITIONS
R_t = 50 Ω
R_t = 75 Ω
R_t = 50 Ω
R_t = 75 Ω
I_lkg(R)
C_I
t_(TJ)
t_(DJ)
t_r, t_f
t_{d(Tx latency)}
Receiver input leakage current
Receiver input capacitance
Serial data total jitter (peak-to-peak)
Serial data deterministic jitter (peak-to-peak)
Differential signal rise, fall time (20% to 80%)
Serial data jitter tolerance minimum required eye
opening, (per IEEE-802.3 specification)
Receiver data acquisition lock time from powerup
Data relock time from loss of synchronization
Tx latency
TBI modes
DDR mode
TBI modes
DDR mode
Differential output jitter,
Random + deterministic,
PRBS pattern, R_ω = 125 MHz
Differential output jitter,
Random + deterministic,
PRBS pattern, R_ω = 106.25 MHz
Differential output jitter,
PRBS pattern, R_ω = 125 MHz
R_L = 50 Ω, C_L = 5 pF,
See Figure 7 and Figure 8
Differential input jitter,
Random + deterministic,
R_ω = 125 MHz
Differential input jitter, random +
determinisitc, PRBS pattern at
zero crossing
See Figure 1
See Figure 6
t_{d(Rx latency)}
Rx latency
TBI mode 600 − 620 Mbps
DDR mode 600 − 620 Mbps
TBI mode 1222.8 Mbps
† _{UI = serial bit time}
DDR mode 1222.8 Mbps
MIN TYP MAX UNIT^†
600 850 1100
mV
800 1050 1200
1100 1250 1400 mV
200
1600 mV
1000 1250 2250 mV
−350
350 µA
2 pF
0.24 UI
0.2 UI
0.12 UI
100
250 ps
0.25
UI
0.3
UI
500 µs
1024 Bit times
19
20
UI
29
30
20
31
27
34
24
28
27
31
UI
25
29
27
33
12
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