TMS320C6674_15 Datasheet, PDF (81/238 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320C6674
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS692E—March 2014
Table 3-7
LRESETNMI PIN Status Register (LRSTNMIPINSTAT) Field Descriptions
Bit Field
31-12 Reserved
11 NMI3
10 NMI2
9
NMI1
8
NMI0
7-4 Reserved
3
LR3
2
LR2
1
LR1
0
LR0
End of Table 3-7
Description
Reserved
CorePac3 in NMI
CorePac2 in NMI
CorePac1 in NMI
CorePac0 in NMI
Reserved
CorePac3 in local reset
CorePac2 in local reset
CorePac1 in local reset
CorePac0 in local reset
3.3.7 LRESETNMI PIN Status Clear Register (LRSTNMIPINSTAT_CLR)
The LRSTNMIPINSTAT_CLR Register is used to clear the status of LRESET and NMI based on CORESEL. The
LRESETNMI PIN Status Clear Register is shown in Figure 3-6 and described in Table 3-8
Figure 3-6 LRESETNMI PIN Status Clear Register (LRSTNMIPINSTAT_CLR)
31
12
11
10
9
8
7
4
3
2
1
0
Reserved
NMI3 NMI2 NMI1 NMI0
R, +0000 0000 0000 0000 0000 WC,+0 WC,+0 WC,+0 WC,+0
Legend: R = Read only; -n = value after reset; WC = Write 1 to Clear
Reserved
R, +0000 0000
LR3
WC,+0
LR2
WC,+0
LR1
WC,+0
LR0
WC,+0
Table 3-8
LRESETNMI PIN Status Clear Register (LRSTNMIPINSTAT_CLR) Field Descriptions
Bit Field
31-12 Reserved
11 NMI3
10 NMI2
9
NMI1
8
NMI0
7-4 Reserved
3
LR3
2
LR2
1
LR1
0
LR0
End of Table 3-8
Description
Reserved
CorePac3 in NMI clear
CorePac2 in NMI clear
CorePac1 in NMI clear
CorePac0 in NMI clear
Reserved
CorePac3 in local reset clear
CorePac2 in local reset clear
CorePac1 in local reset clear
CorePac0 in local reset clear
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Device Configuration 81