TMS320C6674_15 Datasheet, PDF(45/238 Page) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

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TMS320C6674_15 Datasheet, PDF (45/238 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

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TMS320C6674

Multicore Fixed and Floating-Point Digital Signal Processor

SPRS692EâMarch 2014

Table 2-26 Terminal Functions â Signals and Control by Function (Part 2 of 13)

Signal Name

PCIESSMODE0 â

PCIESSMODE1 â

PCIESSEN â

CORECLKP

CORECLKN

SRIOSGMIICLKP

SRIOSGMIICLKN

DDRCLKP

DDRCLKN

PCIECLKP

PCIECLKN

MCMCLKP

MCMCLKN

PASSCLKP

PASSCLKN

AVDDA1

AVDDA2

AVDDA3

SYSCLKOUT

PACLKSEL

HOUT

NMI

LRESET

LRESETNMIEN

CORESEL0

CORESEL1

CORESEL2

CORESEL3

RESETFULL

RESET

POR

RESETSTAT

BOOTCOMPLETE

PTV15

Ball No. Type

K24

IOZ

L27

IOZ

L24

I

AG3 I

AG4 I

AG6 I

AJ6

I

G29 I

H29 I

AG5 I

AH5 I

W2

I

Y2

I

AJ5

I

AJ4

I

H22 P

AC6 P

AD5 P

AE3

OZ

AE4

I

AD20 OZ

M25 I

N26 I

M27 I

AF2

I

AD4 I

AE6

I

AE5

I

N25 I

M29 I

AC20 I

N27 O

AE2

OZ

G22 A

IPD/IPU

Down

Down

Down

Down

Down

UP

UP

UP

UP

Down

Down

Down

Down

UP

UP

UP

Down

Description

PCIe Mode selection pins (Pins shared with GPIO[14:15])

PCIe module enable (Pin shared with TIMI0)

Clock / Reset

Core Clock Input to main PLL.

RapidIO/SGMII Reference Clock to drive the RapidIO and SGMII SerDes

DDR Reference Clock Input to DDR PLL (

PCIe Clock Input to drive PCIe SerDes

HyperLink Reference Clock to drive the HyperLink SerDes

Network Coprocessor (PASS PLL) Reference Clock

SYS_CLK PLL Power Supply Pin

DDR_CLK PLL Power Supply Pin

PASS_CLK PLL Power Supply Pin

System Clock Output to be used as a general purpose output clock for debug purposes

PA clock select to choose between core clock and PASSCLK pins

Interrupt output pulse created by IPCGRH

Non-maskable Interrupt

Warm Reset

Enable for core selects

Select for the target core for LRESET and NMI. For more details see Table 7-46ââNMI and Local Reset

Timing Requirementsââ on page 183

Full Reset

Warm Reset of non isolated portion on the IC

Power-on Reset

Reset Status Output

Boot progress indication output

PTV Compensation NMOS Reference Input. A precision resistor placed between the PTV15 pin

and ground is used to closely tune the output impedance of the DDR interface drivers to 50 ï.

Presently the recommended value for this 1% resistor is 45.3 ï.

Copyright 2014 Texas Instruments Incorporated

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