TMS320C6674_15 Datasheet, PDF (158/238 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320C6674
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS692E—March 2014
Table 7-34 EDMA3 Transfer Controller Configuration
EDMA3 CC0
Parameter
TC0
TC1
FIFOSIZE
1024 bytes 1024 bytes
BUSWIDTH
32 bytes 32 bytes
DSTREGDEPTH 4 entries 4 entries
DBS
128 bytes 128 bytes
End of Table 7-34
TC0
1024 bytes
16 bytes
4 entries
128 bytes
EDMA3 CC1
TC1
TC2
512 bytes 1024 bytes
16 bytes 16 bytes
4 entries 4 entries
64 bytes 128 bytes
TC3
TC0
512 bytes 1024 bytes
16 bytes 16 bytes
4 entries 4 entries
64 bytes 128 bytes
EDMA3 CC2
TC1
TC2
512 bytes 512 bytes
16 bytes 16 bytes
4 entries 4 entries
64 bytes 64 bytes
TC3
1024 bytes
16 bytes
4 entries
128 bytes
7.9.4 EDMA3 Channel Synchronization Events
The EDMA3 supports up to 16 DMA channels for EDMA3CC0, 64 each for EDMA3CC1 and EDMA3CC2 that can
be used to service system peripherals and to move data between system memories. DMA channels can be triggered
by synchronization events generated by system peripherals. The following tables lists the source of the
synchronization event associated with each of the EDMA EDMA3CC DMA channels. On the C6674, the association
of each synchronization event and DMA channel is fixed and cannot be reprogrammed.
For more detailed information on the EDMA3 module and how EDMA3 events are enabled, captured, processed,
prioritized, linked, chained, and cleared, etc., see the Enhanced Direct Memory Access 3 (EDMA3) Controller for
KeyStone Devices User Guide in ‘‘Related Documentation from Texas Instruments’’ on page 72.
Table 7-35 EDMA3CC0 Events for C6674
Event Number
Event
0
TINT8L
1
TINT8H
2
TINT9L
3
TINT9H
4
TINT10L
5
TINT10H
6
TINT11L
7
TINT11H
8
CIC3_OUT0
9
CIC3_OUT1
10
CIC3_OUT2
11
CIC3_OUT3
12
CIC3_OUT4
13
CIC3_OUT5
14
CIC3_OUT6
15
End of Table 7-35
CIC3_OUT7
Event Description
Timer interrupt low
Timer interrupt high
Timer interrupt low
Timer interrupt high
Timer interrupt low
Timer interrupt high
Timer interrupt low
Timer interrupt high
Interrupt Controller output
Interrupt Controller output
Interrupt Controller output
Interrupt Controller output
Interrupt Controller output
Interrupt Controller output
Interrupt Controller output
Interrupt Controller output
Table 7-36 EDMA3CC1 Events for C6674 (Part 1 of 3)
Event Number
Event
Event Description
0
SPIINT0
SPI interrupt
1
SPIINT1
SPI interrupt
2
SPIXEVT
Transmit event
3
SPIREVT
Receive event
158 Peripheral Information and Electrical Specifications
Copyright 2014 Texas Instruments Incorporated
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