TMS320C6674_15 Datasheet, PDF (44/238 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320C6674
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS692E—March 2014
2.8 Terminal Functions
The terminal functions table (Table 2-26) identifies the external signal names, the associated pin (ball) numbers, the
pin type (I, O/Z, or I/O/Z), whether the pin has any internal pullup/pulldown resistors, and gives functional pin
descriptions. This table is arranged by function. The power terminal functions table (Table 2-27) lists the various
power supply pins and ground pins and gives functional pin descriptions. Table 2-28 shows all pins arranged by
signal name. Table 2-29 shows all pins arranged by ball number.
There are 17 pins that have a secondary function as well as a primary function. The secondary function is indicated
with a dagger (†).
For more detailed information on device configuration, peripheral selection, multiplexed/shared pins, and
pullup/pulldown resistors, see section 3.4 ‘‘Pullup/Pulldown Resistors’’ on page 94.
Use the symbol definitions in Table 2-25 when reading Table 2-26.
Table 2-25 I/O Functional Symbol Definitions
Functional
Symbol
Definition
IPD or IPU
Internal 100-μA pulldown or pullup is provided for this terminal. In most systems, a 1-k resistor can
be used to oppose the IPD/IPU. For more detailed information on pulldown/pullup resistors and
situations in which external pulldown/pullup resistors are required, see the Hardware Design Guide for
KeyStone I Devices in ‘‘Related Documentation from Texas Instruments’’ on page 72.
A
Analog signal
GND
Ground
I
Input terminal
O
Output terminal
S
Supply voltage
Z
Three-state terminal or high impedance
End of Table 2-25
Table 2-26
Column Heading
IPD/IPU
Type
Type
Type
Type
Type
Type
Table 2-26 Terminal Functions — Signals and Control by Function (Part 1 of 13)
Signal Name
LENDIAN †
BOOTMODE00 †
BOOTMODE01†
BOOTMODE02 †
BOOTMODE03 †
BOOTMODE04 †
BOOTMODE05 †
BOOTMODE06 †
BOOTMODE07 †
BOOTMODE08 †
BOOTMODE09 †
BOOTMODE10 †
BOOTMODE11 †
BOOTMODE12 †
Ball No. Type
H25 IOZ
J28
IOZ
J29
IOZ
J26
IOZ
J25
IOZ
J27
IOZ
J24
IOZ
K27
IOZ
K28
IOZ
K26
IOZ
K29
IOZ
L28
IOZ
L29
IOZ
K25
IOZ
IPD/IPU
UP
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Down
Description
Boot Configuration Pins
Endian configuration pin (Pin shared with GPIO[0])
See Section 2.5 ‘‘Boot Modes Supported and PLL Settings’’ on page 24 for more details
(Pins shared with GPIO[1:13])
44 Device Overview
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