GC5318 Datasheet, PDF (8/45 Pages) Texas Instruments – HIGH-DENSITY DIGITAL UPCONVERTER

GC5318
HIGH-DENSITY DIGITAL UPCONVERTER
SLWS187 – JULY 2006
t_SU
t_H
txclk
t_pd
t_SU
t_H
www.ti.com
txsync
tx_sync_out
txin
(serial input data)
2txclk
2txclk
(programmable)
MSB
serp_tran_fsdel = 0
serp_tran_clkdiv = 1
Figure 2-4. Serial Input Timing
MSB-1
Table 2-2. Programming
VARIABLE
serp_tran_bits(4:0)
serp_tran_fsinvl(6:0)
serp_tran_fsdel(1:0)
serp_tran_4pin
serp_tran_clkdiv(3:0)
ssel_serial(2:0)
DESCRIPTION
Number of serial input bits in a word – 1. That is, 10001 = 18 bits
Frame sync interval in bits
The number of serial bits after frame strobe that the data MSB is expected.
0 = 2 pin input mode. Applies to UMTS mode for separate I and q data bits, as well as CDMA mode where one
pin is for interleaved I/Q data for the CDMA A channel and another pin for interleaved I/Q data for the CDMA B
channel.
1 = 4 pin mode. Applies to UMTS mode where the channel has two bits for I data (I_msb and I_msb-1) and two bits
for Q data (Q_msb and Q_msb-1)
Serial input data bit clock divider factor – 1
Sync source
The parameters are set for a pair of DUC blocks; that is, for 2k and 2k + 1 DUCs, where k = 0 to 5.
2.1.2 Gain
Figure 2-5. Gain Block
The transmit gain block, shown in Figure 2-5, is a multiplier that increases or decreases the level of the
input data. The unsigned 16-bit gain word is interpreted with the binary point three bits down from the
MSB. It multiplies the input data by (gain word/8192). The maximum gain is therefore 65535/8192. There
are different gain registers for the A and B signals in CDMA mode.
8
GC5318 Operation