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GC5318 Datasheet, PDF (27/45 Pages) Texas Instruments – HIGH-DENSITY DIGITAL UPCONVERTER
www.ti.com
3-Pin Mode (WR_N is the strobe)
RD_N
CE_N
tUPCKL
GC5318
HIGH-DENSITY DIGITAL UPCONVERTER
SLWS187 – JULY 2006
tUPCKH
WR_N
th(UPD)
A(5:0)
D(15:0)
tsu(UPD)
2-Pin Mode (CE_N is the strobe, WR_N select direction)
RD_N is tied to GND
WR_N
t3
CE_N
tUPCKL
tUPCKH
th(UPD)
A(5:0)
D(15:0)
tsu(UPD)
Figure 3-2. Write Diagrams
3.3 Interrupt Handling
When a GC5318 block sets an interrupt, the interrupt pin goes active if the interrupt source is not masked.
The microprocessor should then read the three interrupt flag registers to determine the source of the
interrupt. The microprocessor then has to read the interrupt source circuits register(s) to clear the interrupt
pin and interrupt flag register bit. The three interrupt registers are listed in the global registers part of the
control registers section.
3.4 Sync Signals
Various function blocks within the GC5318 need to be synchronized in order to realize predictable results.
The GC5318 provides a flexible system where each function block that requires synchronization can be
independently synchronized either from device pins or from a software one-shot. The one-shot option is
setup and triggered through control registers. There are four hardware sync input pins available. These
sync pins are qualified on the chip rising clock edge.
Table 3-1 shows the different sync modes available.
Table 3-1. Sync Modes Available
MODE
0
1
2
3
4
5
6
7
Transmit Sync Source
TxSyncA
TxSyncB
TxSyncC
TxSyncD
DUC sync counter TC
DUC sync triggered by one-shot
0 (always off)
1 (always on)
GC5318 General Control
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