BQ26220 Datasheet, PDF (8/19 Pages) Texas Instruments – HIGH PERFORMANCE BATTERY MONITOR IC WITH COULOMB COUNTER, VOLTAGE AND TEMPERATURE MEASUREMENT

bq26220
SLUS521B − AUGUST 2002 − REVISED FEBRUARY 2004
APPLICATION INFORMATION
charge and discharge count operation
Table 1 shows the main counters and registers of the bq26220.
The bq26220 accumulates charge and discharge counts into two count registers, the charge count register
(CCR) and the discharge count register (DCR). Charge and discharge counts are generated by sensing the
voltage difference between SRP and SRN. The CCR or DCR independently counts, depending on the signal
between pins SRP and SRN.
During discharge, the DCR and the discharge time counter (DTC) are active. If (V_(SRP) − V_(SRN)) is less than
0, (indicating a discharge activity), the DCR counts at a rate equivalent to one count per 3.05 µVH, and the DTC
counts at a rate of 1.138 counts per second (4096 counts = 1 hour). For example, if no rollover of the DTC
register is incipient, a negative 24.42-mV signal produces 8000 DCR counts and 4096 DTC counts each hour.
The amount of charge removed from the battery is easily calculated.
During charge, the CCR and the charge time counter (CTC) are active. If (V_(SRP) − V_(SRN)) is greater than 0,
(indicating a charge), the CCR counts at a rate equivalent to one count per 3.05 µVH, and the CTC counts at
a rate of 1.138 counts per seconds. In this case a 24.42-mV signal produces 8000 CCR counts and 4096 CTC
counts (assuming no rollover) each hour.
The DTC and the CTC are 16-bit registers, with roll over beyond FFFFH. If a rollover occurs, the corresponding
bit in the MODE register is set, and the counter increments at 1/256 of the normal rate (16 counts per hour).
While in normal operation, the internal RAM and flash registers of the bq26220 may be accessed over the HDQ
pin.
For self-discharge calculation, the self-discharge count register (SCR) counts at a rate of one count every hour
at a nominal 25°C. The SCR count rate doubles approximately every 10°C up to 60°C. The SCR count rate is
halved every 10°C below 25°C down to 0°C. The value in SCR is useful in estimating the battery self-discharge
based on capacity and storage temperature conditions.
Table 4 shows the bq26220 register memory map. The remaining memory can store user-specific information
such as chemistry, serial number, and manufacturing date.
sleep mode operation
The bq26220 begins low-power operation in response to the host issuing the sleep command. Before entering
the low-power state, the host processor writes the command to transfer the registers to flash. After the sleep
command is sent and the charge/discharge activity is less than the value indicated by the WOE bits shown in
Table 2, the chip clock is powered down and data acquisitions functions cease except for self-discharge
detection. During device sleep the bq26220 periodically wakes briefly to maintain the self-discharge registers.
The bq26220 wakes on either a low-to-high or high-to-low transition on the HDQ pin.
Table 3 shows which registers are active during normal operation, sleep, and hibernate.
NAME
DCR
CCR
SCR
DTC
DESCRIPTION
Discharge count register
Charge count register
Self-discharge count register
Discharge time counter
CTC
Charge time counter
Table 1. bq26220 Counters
RANGE
(V(SRP) − V(SRN)) < VSS (Max. =−100 mV) 3.05 µV/LSB
(V(SRP) − V(SRN)) > VSS (Max. = 100 mV) 3.05 µV/LSB
1 count/hour at 25°C
1 count/0.8789 s (default)
1 count/225 s if STD is set
1 count/0.8789 s (default)
1 count/225 s if STC is set
RAM SIZE
(BITS)
16
16
16
16
16
8
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