BQ26220 Datasheet, PDF (15/19 Pages) Texas Instruments – HIGH PERFORMANCE BATTERY MONITOR IC WITH COULOMB COUNTER, VOLTAGE AND TEMPERATURE MEASUREMENT

bq26220
SLUS521B − AUGUST 2002 − REVISED FEBRUARY 2004
APPLICATION INFORMATION
register descriptions
battery voltage offset registers (BATH)
Bits 3 through 7 of the BATH register (address = 0x72) store the offset information for the voltage ADC. The most
significant bit is the sign bit followed by 4 bits of offset data. Each count of offset represents 8 mV. The host is
responsible for subtracting the offset for the measurement from the uncorrected value found in BATH and BATL
registers. This is a signed magnitude number with Bit 7 being the sign bit. A 1 in Bit 7 means that the number
is negative.
battery voltage registers (BATH/BATL)
The BATH (address = 0x72 – bits 0 through 2) and the BATL low-byte register (address = 0x71) contain the result
of ADC conversion on the battery voltage. The voltage is expressed in an 11-bit binary format with an LSB step
size of 2.44 mV. Bit 3 of BATH register represents the MSB and bit 0 of the BATL represent the LSB.
flash program address register (FPA)
The FPA byte register (address = 0x70) points to the flash address location that is programmed when the
program flash command is issued. This byte is used with the FPD and FCMD register to program an individual
byte in flash memory.
flash program data register (FPD)
The FPD byte register (address = 0x6F) contains the data to be programmed into the flash address location
pointed to by the contents of the FPA register. When the program flash command is issued, the contents of the
FPD register are ANDed with the contents of the byte pointed to by the FPA and then stored into that location.
discharge count registers (DCRH/DCRL)
The DCRH high-byte register (address = 0x6E) and the DCRL low-byte register (address = 0x6D) contain the
count of the discharge, and are incremented whenever V_SR < V_SS These registers continue to count beyond
FFFFH, so proper register maintenance by the host system is necessary. The CLR register forces the reset of
both the DCRH and DCRL to zero.
charge count registers (CCRH/CCRL)
The CCRH high-byte register (address = 0x6C) and the CCRL low-byte register (address = 0x6B) contain the
count of the charge, and are incremented whenever V_SR > V_SS. These registers continue to count beyond
FFFFH, so proper register maintenance should be done by the host system. The CLR register forces the reset
of both the CCRH and CCRL to zero.
self-discharge count registers (SCRH/SCRL)
The SCRH high-byte register (address = 0x6A) and the SCRL low-byte register (address = 0x69) contain the
self-discharge count. This register is continually updated in both the normal operating and sleep modes of the
bq26220. The counts in these registers are incremented based on time and temperature. The SCR counts at
a rate of one count per hour at 20°C to 30°C. The count rate doubles every 10°C up to a maximum of 16
counts/hour at temperatures above 60°C. The count rate halves every 10°C below 20°C to 30°C to a minimum
of one count/8 hours at temperature below 0°C. These registers continue to count beyond FFFFH, so proper
register maintenance should be done by the host system. The CLR register forces the reset of both the SCRH
and SCRL to zero. During device sleep the bq26220 periodically wake for a brief amount of time to maintain
the self-discharge registers.
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