THS10064 Datasheet, PDF (7/41 Pages) Texas Instruments – 10-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER

THS10064
10-BIT 6 MSPS, SIMULTANEOUS SAMPLING
ANALOG-TO-DIGITAL CONVERTER
SLAS255 – DECEMBER 1999
electrical characteristics over recommended operating conditions, V_REF = internal, f_s = 6 MHz,
f_I = 2 MHz at –1dBFS (unless otherwise noted) (continued)
ac specifications, AV_DD = 5 V, BV_DD = DV_DD = 3.3 V, C_L < 30 pF
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
Differential mode
56
59
dB
SINAD Signal-to-noise ratio + distortion
Single-ended mode
(see Note 1)
59
dB
Differential mode
59
61
dB
SNR Signal-to-noise ratio
Single-ended mode
(see Note 1)
60
dB
THD Total harmonic distortion
Differential mode
Single-ended mode
–67 –61 dB
–67
dB
ENOB
(SNR) ^{Effective number of bits}
Differential mode
Single-ended mode
(see Note 1)
9 9.6
Bits
9.5
Bits
SFDR Spurious free dynamic range
Differential mode
Single-ended mode
61
68
dB
68
dB
Analog Input
Full-power bandwidth with a source impedance of 150 Ω in
differential configuration.
Full scale sinewave, –3 dB
96
MHz
Full-power bandwidth with a source impedance of 150 Ω in
single-ended configuration.
Full scale sinewave, –3 dB
54
MHz
Small-signal bandwidth with a source impedance of 150 Ω in
differential configuration.
100 mVpp sinewave, –3 dB
96
MHz
Small-signal bandwidth with a source impedance of 150 Ω in
single-ended configuration.
100 mVpp sinewave, –3 dB
54
MHz
NOTE 1: The SNR (ENOB) and SINAD is degraded typically by 2 dB in single-ended mode when the reading of data is asynchronous to the
sampling clock.
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