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LM3S608-IQN50-C2 Datasheet, PDF (60/538 Pages) Texas Instruments – Stellaris LM3S608 Microcontroller
The Cortex-M3 Processor
NRND: Not recommended for new designs.
Table 2-4. Memory Map (continued)
Start
End
0x4000.9000
0x4000.C000
0x4000.D000
0x4000.E000
Peripherals
0x4002.0000
0x4002.1000
0x4002.4000
0x4002.5000
0x4003.0000
0x4003.1000
0x4003.2000
0x4003.3000
0x4003.8000
0x4003.9000
0x4003.C000
0x4003.D000
0x400F.D000
0x400F.E000
0x400F.F000
0x4200.0000
0x4400.0000
Private Peripheral Bus
0xE000.0000
0xE000.1000
0xE000.2000
0xE000.3000
0xE000.E000
0xE000.F000
0xE004.0000
0xE004.1000
0x4000.BFFF
0x4000.CFFF
0x4000.DFFF
0x4001.FFFF
0x4002.0FFF
0x4002.3FFF
0x4002.4FFF
0x4002.FFFF
0x4003.0FFF
0x4003.1FFF
0x4003.2FFF
0x4003.7FFF
0x4003.8FFF
0x4003.BFFF
0x4003.CFFF
0x400F.CFFF
0x400F.DFFF
0x400F.EFFF
0x41FF.FFFF
0x43FF.FFFF
0xDFFF.FFFF
0xE000.0FFF
0xE000.1FFF
0xE000.2FFF
0xE000.DFFF
0xE000.EFFF
0xE003.FFFF
0xE004.0FFF
0xFFFF.FFFF
Description
Reserved
UART0
UART1
Reserved
For details,
see page ...
-
367
367
-
I2C 0
453
Reserved
-
GPIO Port E
232
Reserved
-
Timer 0
275
Timer 1
275
Timer 2
275
Reserved
-
ADC0
333
Reserved
-
Analog Comparators
475
Reserved
-
Flash memory control
212
System control
161
Reserved
-
Bit-banded alias of 0x4000.0000 through 0x400F.FFFF
-
Reserved
-
Instrumentation Trace Macrocell (ITM)
42
Data Watchpoint and Trace (DWT)
42
Flash Patch and Breakpoint (FPB)
42
Reserved
-
Cortex-M3 Peripherals (SysTick, NVIC, MPU and SCB)
90
Reserved
-
Trace Port Interface Unit (TPIU)
43
Reserved
-
2.4.1
Memory Regions, Types and Attributes
The memory map and the programming of the MPU split the memory map into regions. Each region
has a defined memory type, and some regions have additional memory attributes. The memory
type and attributes determine the behavior of accesses to the region.
The memory types are:
■ Normal: The processor can re-order transactions for efficiency and perform speculative reads.
■ Device: The processor preserves transaction order relative to other transactions to Device or
Strongly Ordered memory.
60
June 18, 2012
Texas Instruments-Production Data