LM3S608-IQN50-C2 Datasheet, PDF (519/538 Pages) Texas Instruments – Stellaris LM3S608 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S608 Microcontroller
31
30
29
28
27
26
25
24
23
22
15
14
13
12
11
10
9
8
7
6
DC4, type RO, offset 0x01C, reset 0x0000.001F (see page 186)
RCGC0, type R/W, offset 0x100, reset 0x00000040 (see page 187)
SCGC0, type R/W, offset 0x110, reset 0x00000040 (see page 189)
MAXADCSPD
MAXADCSPD
DCGC0, type R/W, offset 0x120, reset 0x00000040 (see page 191)
RCGC1, type R/W, offset 0x104, reset 0x00000000 (see page 192)
I2C0
SCGC1, type R/W, offset 0x114, reset 0x00000000 (see page 194)
I2C0
DCGC1, type R/W, offset 0x124, reset 0x00000000 (see page 196)
I2C0
RCGC2, type R/W, offset 0x108, reset 0x00000000 (see page 198)
COMP0
COMP0
COMP0
SCGC2, type R/W, offset 0x118, reset 0x00000000 (see page 199)
DCGC2, type R/W, offset 0x128, reset 0x00000000 (see page 201)
SRCR0, type R/W, offset 0x040, reset 0x00000000 (see page 203)
SRCR1, type R/W, offset 0x044, reset 0x00000000 (see page 204)
I2C0
SRCR2, type R/W, offset 0x048, reset 0x00000000 (see page 206)
COMP0
Internal Memory
Flash Memory Control Registers (Flash Control Offset)
Base 0x400F.D000
FMA, type R/W, offset 0x000, reset 0x0000.0000
FMD, type R/W, offset 0x004, reset 0x0000.0000
FMC, type R/W, offset 0x008, reset 0x0000.0000
OFFSET
DATA
DATA
WRKEY
21
20
19
18
17
16
5
4
3
2
1
0
GPIOE GPIOD GPIOC GPIOB GPIOA
WDT
ADC
WDT
ADC
WDT
ADC
SSI0
TIMER2 TIMER1 TIMER0
UART1 UART0
SSI0
TIMER2 TIMER1 TIMER0
UART1 UART0
SSI0
TIMER2 TIMER1 TIMER0
UART1 UART0
GPIOE GPIOD GPIOC GPIOB GPIOA
GPIOE GPIOD GPIOC GPIOB GPIOA
GPIOE GPIOD GPIOC GPIOB GPIOA
WDT
ADC
SSI0
TIMER2 TIMER1 TIMER0
UART1 UART0
GPIOE GPIOD GPIOC GPIOB GPIOA
COMT MERASE ERASE WRITE
June 18, 2012
519
Texas Instruments-Production Data