LM3S608-IQN50-C2 Datasheet, PDF (186/538 Pages) Texas Instruments – Stellaris LM3S608 Microcontroller

System Control
NRND: Not recommended for new designs.
Register 18: Device Capabilities 4 (DC4), offset 0x01C
This register provides a list of features available in the system. The Stellaris family uses this register
format to indicate the availability of GPIOs in the specific device. The format of this register is
consistent with the RCGC2, SCGC2, and DCGC2 clock control registers and the SRCR2 software
reset control register.
Device Capabilities 4 (DC4)
Base 0x400F.E000
Offset 0x01C
Type RO, reset 0x0000.001F
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
GPIOE GPIOD GPIOC GPIOB GPIOA
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
Bit/Field
31:5
4
3
2
1
0
Name
reserved
GPIOE
GPIOD
GPIOC
GPIOB
GPIOA
Type
RO
RO
RO
RO
RO
RO
Reset
0
1
1
1
1
1
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPIO Port E Present
When set, indicates that GPIO Port E is present.
GPIO Port D Present
When set, indicates that GPIO Port D is present.
GPIO Port C Present
When set, indicates that GPIO Port C is present.
GPIO Port B Present
When set, indicates that GPIO Port B is present.
GPIO Port A Present
When set, indicates that GPIO Port A is present.
186
June 18, 2012
Texas Instruments-Production Data