LM3S608-IQN50-C2 Datasheet, PDF (110/538 Pages) Texas Instruments – Stellaris LM3S608 Microcontroller

Cortex-M3 Peripherals
NRND: Not recommended for new designs.
Bit/Field
10:8
7:3
2
1
0
Name
PRIGROUP
reserved
SYSRESREQ
VECTCLRACT
VECTRESET
Type
R/W
RO
WO
WO
WO
Reset
0x0
0x0
0
0
0
Description
Interrupt Priority Grouping
This field determines the split of group priority from subpriority (see
Table 3-8 on page 109 for more information).
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
System Reset Request
Value Description
0 No effect.
1 Resets the core and all on-chip peripherals except the Debug
interface.
This bit is automatically cleared during the reset of the core and reads
as 0.
Clear Active NMI / Fault
This bit is reserved for Debug use and reads as 0. This bit must be
written as a 0, otherwise behavior is unpredictable.
System Reset
This bit is reserved for Debug use and reads as 0. This bit must be
written as a 0, otherwise behavior is unpredictable.
110
June 18, 2012
Texas Instruments-Production Data