THS1207 Datasheet, PDF (6/33 Pages) Texas Instruments – 12 bit 4 ANALOG INPUT 6 MSPS SIMULTANEOUS SAMPLING

THS1207
SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002
FUNCTIONAL BLOCK DIAGRAM
AVDD
REFP
VREFP
3.5 V
1.5 V
DVDD
1.225 V
REF
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2.5 V
REFOUT
REFM
REFIN
AINP
AINM
BINP
BINM
CONV_CLK
CS0
CS1
RD
WR (R/W)
S/H
VREFM
Single
S/H
Ended
+
and/or
12 Bit
12
Differential
MUX
Pipeline
–
ADC
S/H
S/H
Logic and Control
Control
Register
AGND
Buffers
DGND
BVDD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10/RA0
D11/RA1
BGND
SYNC
6