THS1207 Datasheet, PDF(27/33 Page) Texas Instruments – 12 bit 4 ANALOG INPUT 6 MSPS SIMULTANEOUS SAMPLING

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THS1207 Datasheet, PDF (27/33 Pages) Texas Instruments – 12 bit 4 ANALOG INPUT 6 MSPS SIMULTANEOUS SAMPLING

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THS1207

SLAS284A â AUGUST 2000 â REVISED DECEMBER 2002

ANALOG INPUT CONFIGURATION AND REFERENCE VOLTAGE

The THS1207 features four analog input channels. These can be configured for either single-ended or

differential operation. Figure 36 shows a simplified model, where a single-ended configuration for channel AINP

is selected. The reference voltages for the ADC itself are VREFP and VREFM (either internal or external reference

voltages). The analog input voltage range is between VREFM to VREFP. This means that VREFM defines the

minimum voltage, and VREFP defines the maximum voltage, which can be applied to the ADC. The internal

reference source provides the voltage VREFM of 1.5 V and the voltage VREFP of 3.5 V (see also section

reference voltage). The resulting analog input voltage swing of 2 V can be expressed by:

VREFM v AINP v VREFP

(1)

VREFP

AINP

12-Bit

ADC

VREFM

Figure 36. Single-Ended Input Stage

A differential operation is desired in many applications due to a better signal-to-noise ration. Figure 37 shows

a simplified model for the analog inputs AINM and AINP, which are configured for differential operation. The

differential operation mode provides in terms of performance benefits over single-ended mode and is therefore

recommended for best performance. The THS1207 offers 2 differential analog inputs and in the single-ended

mode 4 analog inputs. If the analog input architecture is differential, common mode noise and common mode

voltages can be rejected. Additional details for both modes are given below.

AINP

AINM

VREFP

Î£ VADC

12-Bit

ADC

VREFM

Figure 37. Differential Input Stage

In comparison to the single-ended configuration it can be seen that the voltage, VADC, which is applied at the

input of the ADC is the difference between the input AINP and AINM. The voltage VADC can be calculated as

follows:

VADC + ABS(AINPâAINM)

(2)

The advantage to single-ended operation is that the common-mode voltage

VCM

AINM

)

AINP

(3)

can be rejected in the differential configuration, if the following condition for the analog input voltages is true:

AGND v AINM, AINP v AVDD

(4)

1 V v VCM v 4 V

(5)

▷