CDC7005 Datasheet, PDF (6/29 Pages) Texas Instruments – 3.3-V HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER

CDC7005
3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER
SCAS685E − DECEMBER 2002 − REVISED NOVEMBER 2004
Table 2. Word 1
BIT
BIT
NAME
DESCRIPTION/FUNCTION
0
C0
Register selection
1
C1
Register selection
2
N0
VCXO divider N bit 0
3
N1
VCXO divider N bit 1
4
N2
VCXO divider N bit 2
5
N3
VCXO divider N bit 3
6
N4
VCXO ^{VCXO divider N bit 4}
7
N5
Divider N _{VCXO divider N bit 5}
8
N6
VCXO divider N bit 6
9
N7
VCXO divider N bit 7
10
N8
VCXO divider N bit 8
11
N9
VCXO divider N bit 9
12
ND0
VCXO delay N bit 0
13
ND1
VCXO
Delay N
VCXO delay N bit 1
14
ND2
VCXO delay N bit 2
15 MUX00
MUX0 select bit 0
16 MUX01 MUX0 MUX0 select bit 1
17 MUX02
MUX0 select bit 2
18 MUX10
MUX1 select bit 0
19 MUX11 MUX1 MUX1 select bit 1
20 MUX12
MUX1 select bit 2
21 MUX20
MUX2 select bit 0
22 MUX21 MUX2 MUX2 select bit 1
23 MUX22
MUX2 select bit 2
24 MUX30
MUX3 select bit 0
25 MUX31 MUX3 MUX3 select bit 1
26 MUX32
MUX3 select bit 2
27 MUX40
MUX4 select bit 0
28 MUX41 MUX4 MUX4 select bit 1
29 MUX42
MUX4 select bit 2
30 CP_DIR
Determines in which direction CP should regulate, if
REF_CLK is faster than VCXO_CLK, and vice versa (see
Figure 2)
31
REXT
Enable external reference resistor (1 = enabled)
TYPE
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
POWER-UP
CONDITION
1
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
1
1
0
1
1
0
1
W
0
PIN
AFFECTED
F1, G1
F1, G1
F1, G1
H2, H3
H2, H3
H2, H3
H4, H5
H4, H5
H4, H5
H6, H7
H6, H7
H6, H7
G8, F8
G8, F8
G8, F8
A4
C1
6
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