CDC7005 Datasheet, PDF (24/29 Pages) Texas Instruments – 3.3-V HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER

CDC7005
3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER
SCAS685E − DECEMBER 2002 − REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
3.3 kΩ
180 Ω
VIN
AVCC
10 kΩ
AVCC
−
+
450 Ω
VOUT
50 Ω
(Oscilloscope)
10 kΩ
10 nF
Figure 14. OPA Slew Rate/Gain Bandwidth Test Circuit
900 Ω
180 Ω
VIN
180 Ω
AVCC
−
+
VOUT
900 Ω
NOTE: CMRR (dB) = 20 x Log (VIN/(VIN − VOUT)) x (1 + 900/180)
Figure 15. CMRR Test Circuits
AVCC
900 Ω
10 kΩ
180 Ω
AVCC
−
+
10 kΩ
VOUT
NOTE: PSRR (dB) = (∆AVCC/VOUT) x (900/180)
Figure 16. PSRR Test Circuit
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