CDC7005 Datasheet, PDF (13/29 Pages) Texas Instruments – 3.3-V HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER

CDC7005
3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER
SCAS685E − DECEMBER 2002 − REVISED NOVEMBER 2004
absolute maximum ratings over operating free-air temperature (unless otherwise noted)^†
Supply voltage range, V_CC, AV_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Input voltage range, V_I (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V_CC + 0.5 V
Output voltage range, V_O (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V_CC + 0.5 V
Input current (V_I < 0, V_I > V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output current for LVPECL outputs (0 < V_O < V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, I_O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Maximum junction temperature, T_J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125°C
Package thermal impedance, θ_JA (see Note 5): ZVA package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54°C/W
Storage temperature range T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† _{Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and}
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 4. The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
5. The package thermal impedance is calculated in accordance with JESD 51 (no airflow condition) and JEDEC2S2P (high-k board).
The total for power consumption (VCC x ICC) includes device and termination power consumptions, see Figure 5.
recommended operating conditions
Supply voltage, VCC
Operating free-air temperature, TA
Low-level input voltage LVCMOS, VIL
High-level input voltage LVCMOS, VIH
Input threshold voltage LVCMOS, VIT
High-level output current LVCMOS, IOH
Low-level output current LVCMOS, IOL
Input voltage range LVCMOS, VI
Low-level input voltage LVPECL, VIL
High-level input voltage LVPECL, VIH
MIN
NOM
3
3.3
−40
0.7 VCC
0.5 VCC
0
VCC−1.81
VCC−1.26
MAX
3.6
85
0.3 VCC
−6
6
3.6
VCC−1.475
VCC−0.88
UNIT
V
°C
V
V
V
mA
mA
V
V
V
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
13