CDC7005 Datasheet, PDF (10/29 Pages) Texas Instruments – 3.3-V HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER

CDC7005
3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER
SCAS685E − DECEMBER 2002 − REVISED NOVEMBER 2004
functional description of the logic (continued)
LockW 1
0
0
1
1
LockW 0
0
1
0
1
Table 8. Lock Detect Window
REF_IN TO Yn TOLERABLE PHASE OFFSET (See Figure 4)
±1.2 ns
±1.8 ns
±2.4 ns
±3 ns
Table 9. Charge Pump Current
CP3
CP2
CP1
CP0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
† _{With an internal or external reference resistor (12 kΩ) in use.}
NOMINAL CHARGE PUMP CURRENT†
0.625 mA
1.25 mA
1.875 mA
2.5 mA
3.125 mA
3.75 mA
4.375 mA
5 mA
1 mA
2 mA
3 mA
4 mA
5 mA
6 mA
7 mA
8 mA
MUXS2
0
0
0
0
1
1
1
1
MUXS1
0
0
1
1
0
0
1
1
Table 10. MUXSEL Selection
MUXS0
0
1
0
1
0
1
0
1
SELECTED VCXO SIGNAL FOR THE PHASE
DISCRIMINATOR
Y0
Y1
Y2
Y3
Y4
Y3
Y3
Y3
DEFAULT
Yes
DEFAULT
Yes
DEFAULT
Yes
10
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