THS8083APZPG4 Datasheet, PDF (52/63 Pages) Texas Instruments – Triple 8-Bit, 80 MSPS 3.3-V Video and Graphics

7 Application Information
7.1 Designing With PowerPAD
The THS8083A is housed in a high-performance, thermally enhanced, 100-pin PowerPAD package (TI package
designator: 100PZP). Use of the PowerPAD package does not require any special considerations except to note that
the PowerPAD, which is an exposed die pad on the bottom of the device, is a metallic thermal and electrical conductor.
Therefore, if not implementing the PowerPAD PCB features, the use of solder masks (or other assembly techniques)
may be required to prevent any inadvertent shorting by the exposed PowerPAD of connection etches or vias under
the package. The recommended option, however, is not to run any etches or signal vias under the device, but to have
only a grounded thermal land as explained below. Although the actual size of the exposed die pad may vary, the
minimum size required for the keepout area of the 100-pin PZP PowerPAD package is 5 mm × 5 mm.
It is recommended that there be a thermal land, which is an area of solder-tinned-copper, underneath the PowerPAD
package. The thermal land varies in size, depending on the PowerPAD package being used, the PCB construction,
and the amount of heat that needs to be removed. In addition, the thermal land may or may not contain numerous
thermal vias, depending on PCB construction.
More information on this package and other requirements for using thermal lands and thermal vias are detailed in
the TI application note PowerPAD Thermally Enhanced Package Application Report, TI literature number SLMA002,
available via the TI Web pages beginning at URL: http://www.ti.com
For the THS8083A, this thermal land should be grounded to the low impedance ground plane of the device. This
improves thermal performance and the electrical grounding of the device. It is also recommended that the device
ground terminal landing pads be connected directly to the grounded thermal land. The land size should be as large
as possible without shorting device signal terminals. The thermal land may be soldered to the exposed PowerPAD
using standard reflow soldering techniques.
While the thermal land may be electrically floated and configured to remove heat to an external heat sink, it is
recommended that the thermal land be connected to the low impedance ground plane of the device.
Table 6-1 lists a comparison between the thermal resistances of the PowerPAD package (100PZP) used for this
device and a regular 100-pin TQFP package.
Table 7−1. Junction-Ambient and Junction-Case Thermal Resistances
100 PZP PowerPAD vs
100 PIN REGULAR TQFP
AIRFLOW IN lfm
0 150 250 500
θ_JA (°C/W) 100 PZP
θ_JC (°C/W) 100 PZP
θ_JA (°C/W) 100 pin regular
θ_JC (°C/W) 100 pin regular
17.3 11.8 10.4
9.0
0.12
49
3
PowerPAD is a trademark of Texas Instruments.
7−1