THS8083APZPG4 Datasheet, PDF (37/63 Pages) Texas Instruments – Triple 8-Bit, 80 MSPS 3.3-V Video and Graphics

4.1.2 Read Format
First write the subaddress, where data needs to be read out, to the THS8083A in the following format:
S Slave address(w) A Subaddress A P
Then:
S Slave address(r) A DataN AM Data(N+1) AM
……
NAM ^P
S
Slave address(r)
A
AM
Start condition
01000001 (0x41) if I2CA=0 / 01000011 (0x43) if I2CA=1
Acknowledge, generated by the THS8083A. If transmission is successful, then A = 0,
else A = 1.
Acknowledge, generated by a master
NAM
Not acknowledge, generated by a master
Subaddress
Data0
Data(N−1)
P
Subaddress of the first register to read, length = one byte
First byte of the data read
Nth byte of the data read
Stop condition
In both write and read operations, the subaddress is incremented automatically when multiple bytes are written/read.
So, only the first subaddress needs to be supplied to the THS8083A.
R/W registers can be written and read.
R registers are read-only.
4−2