THS8083APZPG4 Datasheet, PDF (46/63 Pages) Texas Instruments – Triple 8-Bit, 80 MSPS 3.3-V Video and Graphics

6.4 Electrical Characteristics Over Recommended Operating Free-Air Temperature
Range, T_A = 0°C to 70°C (unless otherwise noted)
6.4.1
NOTE: In order to reach stated performance levels, the device’s PowerPad feature should be
thermally and electrically connected to the pcb ground plane, as described in Section 6.1
Designing With PowerPad.
Power Supply (3.3 V All Supplies)
PARAMETER
Analog supply (=AVDD_CH1+AVDD_CH2_3+AVDD_PLL+AVDD_REF)
Digital supply (=DVDD+DVDD_PLL)
Total power dissipation normal operation
Total power dissipation, power down all modes
TEST CONDITIONS
ADC_INTREF
ADC_INTREF
ADC_INTREF
ADC_PWDN
MIN TYP MAX UNIT
325 385 mA
119 140 mA
1.47 1.73 W
385 mW
6.4.2 Digital Logic Inputs (HS, VS, SCL, SDA, I2CA, XTL1_MCLK, EXT_ADCCLK, OE, RESET,
EXT_CLP)
PARAMETER
TEST CONDITIONS
IIH
IIL
IIL(CLK)
IIH(CLK)
High-level input current
Low-level input current
Low-level input current, CLK (see Note 6)
High-level input current , CLK (see Note 6)
DVDD = 3.6 V,
Digital inputs and CLK at 0 V for IIL;
Digital inputs and CLK at 3.6 V for IIH
CI
Input capacitance
NOTE 6: Applies when XTL1_MCLK is driven by the clock signal directly.
MIN TYP MAX UNIT
−10
10 µA
−10
10 µA
−14
17 µA
−14
17 µA
5
pF
6.4.3 Logic Outputs (SDA, CHn_OUTA[7..0], CHn_OUTB[7..0], DTOCLK3, ADCCLK2,
DATACLK1, DHS, LOCK)
VOH
PARAMETER
High-level output voltage
VOL
Low-level output voltage
CO
Output capacitance
IOZ(H)/IOZ(L)† High-impedance-state output current
† _{Tested for CHn-A[7..0] and CHn_B[7..0] only}
TEST CONDITIONS
DVDD = 3 V at IOH = 50 µA,
Digital output forced high
DVDD = 3.6 V at IOL = 50 µA,
Digital output forced low
DVDD = 3.6 V
Worst case for VO = 3.6 V and VO = 0 V
MIN TYP MAX UNIT
2.9
V
0.15 V
5
pF
−10
10 µA
6−3