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OMAP-L138_10 Datasheet, PDF (51/268 Pages) Texas Instruments – Low-Power Applications Processor
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OMAP-L138 Low-Power Applications Processor
SPRS586A – JUNE 2009 – REVISED AUGUST 2009
3.9.17 Universal Serial Bus Modules (USB0, USB1)
Table 3-20. Universal Serial Bus (USB) Terminal Functions
SIGNAL
NAME
USB0_DM
USB0_DP
USB0_VDDA33
USB0_ID
USB0_VBUS
USB0_DRVVBUS
AHCLKX / USB_REFCLKIN / UART1_CTS /
GP0[10] / PRU0_R31[17]
USB0_VDDA18
USB0_VDDA12
USB_CVDD
USB1_DM
USB1_DP
AHCLKX / USB_REFCLKIN / UART1_CTS /
GP0[10] / PRU0_R31[17]
USB1_VDDA33
USB1_VDDA18
USB_CVDD
TYPE (1)
NO.
PULL (2)
POWER
GROUP (3)
DESCRIPTION
USB0 2.0 OTG (USB0)
M18
A
—
—
USB0 PHY data minus
M19
A
—
—
USB0 PHY data plus
N18 PWR
—
—
USB0 PHY 3.3-V supply
P16
A
—
—
USB0 PHY identification
(mini-A or mini-B plug)
N19
A
—
—
USB0 bus voltage
K18
0
—
B
USB0 controller VBUS control output.
A3
I
CP[0]
A
USB_REFCLKIN. Optional clock input
N14 PWR
—
—
N17 PWR
—
—
M12 PWR
—
—
USB1 1.1 OHCI (USB1)
P18
A
—
—
P19
A
—
—
USB0 PHY 1.8-V supply input
USB0 PHY 1.2-V LDO output for bypass cap
USB0 and USB1 core logic 1.2-V supply
input
USB1 PHY data minus
USB1 PHY data plus
A3
I
CP[0]
A
USB_REFCLKIN. Optional clock input
P15 PWR
—
P14 PWR
—
M12 PWR
—
—
USB1 PHY 3.3-V supply
—
USB1 PHY 1.8-V supply
—
USB0 and USB1 core logic 1.2-V supply
input
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor; IPU = Internal Pullup resistor; CP[n] = configurable pull-up/pull-down (where n is the pin group) using
the PUPDENA and PUPDSEL registers in the System Module. The pull-up and pull-down control of these pins is not active until the
device is out of reset. During reset, all of the pins associated with these registers are weakly pulled down. If the application requires a
pull-up, an external pull-up can be used.
(3) This signal is part of a dual-voltage IO group (A, B or C). These groups can be operated at 3.3V or 1.8V nominal. The three groups can
be operated at independent voltages but all pins withina group will operate at the same voltage. Group A operates at the voltage of
power supply DVDD3318_A. Group B operates at the voltage of power supply DVDD3318_B. Group C operates at the voltage of power
supply DVDD3318_C.
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