TMS320C4X Datasheet, PDF (492/726 Pages) Texas Instruments – Digital Signal Processing Solutions

Status Bits
Mode Bit
Cycles
Example
Decrement and Branch Conditionally (Standard) DBcond
LUF Unaffected
LV Unaffected
UF Unaffected
N Unaffected
Z Unaffected
V Unaffected
C Unaffected
OVM operation is not affected by OVM bit value.
4
DBLT AR3,R2
Before Instruction
PC
5Fh
PC
AR3
12h
AR3
R2
9Fh
R2
LUF
0
LUF
LV
0
LV
UF
0
UF
N
1
N
Z
0
Z
V
0
V
C
0
C
After Instruction
9Fh
11h
9Fh
0
0
0
1
0
0
0
Assembly Language Instructions
14-87