TMS320C4X Datasheet, PDF (417/726 Pages) Texas Instruments – Digital Signal Processing Solutions

Condition Codes and Flags
14.2 Condition Codes and Flags
The ’C4x provides 20 condition codes (00000 – 10100, excluding 01011) that
can be used with any of the conditional instructions, such as RETScond or
LDFcond. The conditions include signed and unsigned comparisons, compari-
sons to zero, and comparisons based on the status of individual condition
flags. Note that all conditional instructions can also accept the suffix U to indi-
cate unconditional operation.
Seven condition flags provide information about properties of the result of
arithmetic and logical instructions. The condition flags are stored in the status
register (ST); the effect of an instruction on a condition flag depends on the val-
ue of the SET COND field (bit 15 of the status register). The value of SET
COND (0 or 1) does not affect the nature of the compare instructions (CMPF,
CMPF3, CMPI, CMPI3, TSTB, or TSTB3).
- If SET COND = 0, the ST condition flags are set if the operation’s target
is any extended-precision register (R0–R11) .
- If SET COND = 1, the ST condition flags are also set if the operation’s tar-
get is any register in the primary register file except the status register.
The condition flags can be modified by most instructions when either of the
preceding conditions is established and either of the following two cases oc-
curs:
- A result is generated when the specified operation is performed to infinite
precision. This is appropriate for compare-and-test instructions that do not
store results in a register. It is also appropriate for arithmetic instructions
that produce underflow or overflow.
- The output is written to the destination register as shown in Table 14–7.
This is appropriate for other instructions that modify the condition flags.
Table 14–7.Output Value Formats
Type of
Operation
Floating-point
Integer
Logical
Output Format
8-bit exponent, 1 sign bit, 31-bit fraction
32-bit integer
32-bit unsigned integer
14-12