CC2500 Datasheet, PDF (46/76 Pages) Texas Instruments – Single Chip Low Cost Low Power RF Transceiver

CC2500
GDO0_CFG[5:0]
GDO1_CFG[5:0] Description
GDO2_CFG[5:0]
0 (0x00)
Associated to the RX FIFO: Asserts when RX FIFO is filled above RXFIFO_THR. De-asserts when RX FIFO is drained
below RXFIFO_THR.
1 (0x01)
Associated to the RX FIFO: Asserts when RX FIFO is filled above RXFIFO_THR or the end of packet is reached. De-
asserts when RX FIFO is empty.
2 (0x02)
Associated to the TX FIFO: Asserts when the TX FIFO is filled above TXFIFO_THR. De-asserts when the TX FIFO is
below TXFIFO_THR.
3 (0x03)
Associated to the TX FIFO: Asserts when TX FIFO is full. De-asserts when the TX FIFO is drained below
TXFIFO_THR.
4 (0x04) Asserts when the RX FIFO has overflowed. De-asserts when the FIFO has been flushed.
5 (0x05) Asserts when the TX FIFO has underflowed. De-asserts when the FIFO is flushed.
6 (0x06)
Asserts when sync word has been sent / received, and de-asserts at the end of the packet. In RX, the pin will de-assert
when the optional address check fails or the RX FIFO overflows. In TX the pin will de-assert if the TX FIFO underflows.
7 (0x07) Reserved
8 (0x08) Preamble Quality Reached. Asserts when the PQI is above the programmed PQT value.
9 (0x09) Clear channel assessment. High when RSSI level is below threshold (dependent on the current CCA_MODE setting)
10 (0x0A) Lock detector output
11 (0x0B)
Serial Clock. Synchronous to the data in synchronous serial mode.
Data is set up on the falling edge and is read on the rising edge of SERIAL_CLK when GDOx_INV=0.
12 (0x0C)
Serial Synchronous Data Output (DO). Used for synchronous serial mode. The MCU must read DO on the rising edge
of SERIAL_CLK when GDOx_INV=0. Data is set up on the falling edge by CC2500.
13 (0x0D) Serial transparent Data Output. Used for asynchronous serial mode.
14 (0x0E) Carrier sense. High if RSSI level is above threshold.
15 (0x0F) Reserved
16 (0x10) Reserved – used for test.
17 (0x11) Reserved – used for test.
18 (0x12) Reserved – used for test.
19 (0x13) Reserved – used for test.
20 (0x14) Reserved – used for test.
21 (0x15) Reserved – used for test.
22 (0x16) RX_HARD_DATA[1]. Can be used together with RX_SYMBOL_TICK for alternative serial RX output.
23 (0x17) RX_HARD_DATA[0]. Can be used together with RX_SYMBOL_TICK for alternative serial RX output.
24 (0x18) Reserved – used for test.
25 (0x19) Reserved – used for test.
26 (0x1A) Reserved – used for test.
27 (0x1B) PA_PD. PA is enabled when 0, in power-down when 1. Can be used to control external PA or RX/TX switch.
28 (0x1C) LNA_PD. LNA is enabled when 0, in power-down when 1. Can be used to control external LNA or RX/TX switch.
29 (0x1D) RX_SYMBOL_TICK. Can be used together with RX_HARD_DATA for alternative serial RX output.
30 (0x1E) Reserved – used for test.
31 (0x1F) Reserved – used for test.
32 (0x20) Reserved – used for test.
33 (0x21) Reserved – used for test.
34 (0x22) Reserved – used for test.
35 (0x23) Reserved – used for test.
36 (0x24) Reserved – used for test.
37 (0x25) Reserved – used for test.
38 (0x26) Reserved – used for test.
39 (0x27) Reserved – used for test.
40 (0x28) Reserved – used for test.
41 (0x29) CHIP_RDY
42 (0x2A) Reserved – used for test.
43 (0x2B) XOSC_STABLE
44 (0x2C) Reserved – used for test.
45 (0x2D) GDO0_Z_EN_N. When this output is 0, GDO0 is configured as input (for serial TX data).
46 (0x2E) High impedance (3-state)
47 (0x2F) HW to 0 (HW1 achieved with _INV signal)
48 (0x30) CLK_XOSC/1
49 (0x31) CLK_XOSC/1.5
50 (0x32) CLK_XOSC/2
51 (0x33) CLK_XOSC/3
52 (0x34) CLK_XOSC/4
53 (0x35) CLK_XOSC/6
54 (0x36) CLK_XOSC/8
55 (0x37) CLK_XOSC/12
56 (0x38) CLK_XOSC/16
57 (0x39) CLK_XOSC/24
58 (0x3A) CLK_XOSC/32
59 (0x3B) CLK_XOSC/48
60 (0x3C) CLK_XOSC/64
61 (0x3D) CLK_XOSC/96
62 (0x3E) CLK_XOSC/128
63 (0x3F) CLK_XOSC/192
Table 33: GDO signal selection
Preliminary Data Sheet (rev.1.1.) SWRS040
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