OMAP3503DCBBA Datasheet, PDF (43/264 Pages) Texas Instruments – OMAP3515 and OMAP3503 Applications Processors

OMAP3515, OMAP3503
www.ti.com
SPRS505H – FEBRUARY 2008 – REVISED OCTOBER 2013
Table 2-1. Ball Characteristics (CBB Pkg.)⁽¹⁾ (continued)
BALL
BALL TOP PIN NAME MODE [4] TYPE [5]
BOTTOM [1] [2]
[3]
hsusb1_
3
IO
data7
gpio_17
4
IO
hsusb1_tll_ 6
IO
data7
AE11
NA
etk_d4
0
O
mcbsp5_dr 1
I
mmc3_dat0 2
IO
hsusb1_
3
IO
data4
gpio_18
4
IO
hsusb1_tll_ 6
IO
data4
AH9
NA
etk_d5
0
O
mcbsp5_fsx 1
IO
mmc3_dat1 2
IO
hsusb1_
3
IO
data5
gpio_19
4
IO
hsusb1_tll_ 6
IO
data5
AF13
NA
etk_d6
0
O
mcbsp5_dx 1
IO
mmc3_dat2 2
IO
hsusb1_
3
IO
data6
gpio_20
4
IO
hsusb1_tll_ 6
IO
data6
AH14
NA
etk_d7
0
O
mcspi3_cs1 1
O
mmc3_dat7 2
IO
hsusb1_
3
IO
data3
gpio_21
4
IO
mm1_txen_n 5
IO
hsusb1_tll_ 6
IO
data3
AF9
NA
etk_d8
0
O
sys_drm_ 1
I
msecure
mmc3_dat6 2
IO
hsusb1_dir 3
I
gpio_22
4
IO
hsusb1_tll_di 6
O
r
AG9
NA
etk_d9
0
O
sys_secure_i 1
O
ndic ator
mmc3_dat5 2
IO
hsusb1_nxt 3
I
gpio_23
4
IO
mm1_rxdm 5
IO
hsusb1_tll_n 6
O
xt
AE7
NA
etk_d10
0
O
uart1_rx
2
I
hsusb2_clk 3
O
gpio_24
4
IO
BALL
RESET
STATE [6]
BALL
RESET REL. POWER [9] HYS [10]
RESET REL. MODE [8]
STATE [7]
L
L
4
vdds
Yes
L
L
4
vdds
Yes
L
L
4
vdds
Yes
L
L
4
vdds
Yes
L
L
4
vdds
Yes
L
L
4
vdds
Yes
L
L
4
vdds
Yes
BUFFER PULLUP
STRENG TH /DOWN
(mA) [11] TYPE [12]
IO CELL [13]
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
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