OMAP3503DCBBA Datasheet, PDF (180/264 Pages) Texas Instruments – OMAP3515 and OMAP3503 Applications Processors

OMAP3515, OMAP3503
SPRS505H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
X
A1
Y
OFFSET
Y
LPDDR
Device
Y
OFFSET
A1
OMAP
Recommended LPDDR Device
Orientation
Figure 6-19. OMAP35x and LPDDR Device Placement
Table 6-16. Placement Specifications
NO. PARAMETER
1
X
2
Y
3
Y Offset
4
LPDDR Keepout Region
MIN
MAX
UNIT
1440
Mils
1030
Mils
525
Mils
NOTES
See Notes⁽¹⁾, ⁽²⁾
See Notes⁽¹⁾, ⁽²⁾
See Notes⁽¹⁾,⁽²⁾,⁽³⁾
See Note⁽⁴⁾
5
Clearance from non-LPDDR signal to LPDDR
Keepout Region
4
w
See Note⁽⁵⁾
(1) See Figure 6-17 for dimension definitions.
(2) Measurements from center of device to center of LPDDR device.
(3) For 16 bit memory systems it is recommended that Y Offset be as small as possible.
(4) LPDDR keepout region to encompass entire LPDDR routing area.
(5) Non-LPDDR signals allowed within LPDDR keepout region provided they are separated from LPDDR routing layers by a ground plane.
6.4.2.4 LPDDR Keep Out Region
The region of the PCB used for the LPDDR circuitry must be isolated from other signals. The LPDDR
keep out region is defined for this purpose and is shown in Figure 6-20. The size of this region varies with
the placement and LPDDR routing. Additional clearances required for the keep out region are shown in
Table 6-16.
180 TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
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