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CC430F613X_12 Datasheet, PDF (43/121 Pages) Texas Instruments – MSP430™ SoC with RF Core
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ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F613x
CC430F612x
CC430F513x
SLAS554F – MAY 2009 – REVISED DECEMBER 2011
Low-Power Mode Supply Currents (Into VCC) Excluding External Current
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (2)
PARAMETER
Temperature (TA)
VCC
PMMCOREVx
-40°C
25°C
60°C
85°C
UNIT
TYP MAX TYP MAX TYP MAX TYP MAX
2.2 V
0
ILPM0,1MHz Low-power mode 0(3) (4)
3.0 V
3
80
100
90
110
80
100
90
110
80
100
90
110
80
100
µA
90
110
2.2 V
0
ILPM2
Low-power mode 2(5) (4)
3.0 V
3
6.5
11
6.5
11
6.5
11
6.5
11
µA
7.5
12
7.5
12
7.5
12
7.5
12
0
1.8
2.0
2.6
3.0
4.0
4.4
5.9
ILPM3,XT1LF
Low-power mode 3, crystal
mode (6) (4)
3.0 V
1
2
1.9
2.0
2.1
2.2
3.2
3.4
4.8
µA
5.1
3
2.0
2.2
2.9
3.5
4.8
5.3
7.4
0
0.9
1.1
2.3
2.1
3.7
3.5
5.6
ILPM3,VLO
Low-power mode 3,
VLO mode(7) (4)
1
3.0 V
2
1.0
1.1
1.2
1.3
2.3
2.5
3.9
µA
4.2
3
1.1
1.3
2.6
2.6
4.5
4.4
7.1
0
0.8
1.0
2.2
2.0
3.6
3.4
5.5
1
0.9
1.1
2.2
3.8
ILPM4
Low-power mode 4(8) (4)
3.0 V
2
1.0
1.2
2.4
µA
4.1
3
1.0
1.2
2.5
2.5
4.4
4.3
7.0
(1) All inputs are tied to 0 V or to VCC. Outputs do not source or sink any current.
(2) The currents are characterized with a Micro Crystal MS1V-T1K crystal with a load capacitance of 12.5 pF. The internal and external load
capacitance are chosen to closely match the required 12.5 pF.
(3) Current for watchdog timer clocked by SMCLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 0, OSCOFF = 0 (LPM0); fACLK = 32768 Hz, fMCLK = 0 MHz, fSMCLK = fDCO = 1 MHz
(4) Current for brownout, high side supervisor (SVSH) normal mode included. Low side supervisor and monitors disabled (SVSL, SVML).
High side monitor disabled (SVMH). RAM retention enabled.
(5) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 1, OSCOFF = 0 (LPM2); fACLK = 32768 Hz, fMCLK = 0 MHz, fSMCLK = fDCO = 0 MHz; DCO setting = 1
MHz operation, DCO bias generator enabled.
(6) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); fACLK = 32768 Hz, fMCLK = fSMCLK = fDCO = 0 MHz
(7) Current for watchdog timer and RTC clocked by ACLK included. ACLK = VLO.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); fACLK = fVLO, fMCLK = fSMCLK = fDCO = 0 MHz
(8) CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1 (LPM4); fDCO = fACLK = fMCLK = fSMCLK = 0 MHz
Copyright © 2009–2011, Texas Instruments Incorporated
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