TLC5949 Datasheet, PDF (40/51 Pages) Texas Instruments – 16-Channel, 12-Bit, ES-PWM, Full Self-Diagnosis LED Driver for 7-Bit Global BC LED Lamp

TLC5949
SBVS219A – DECEMBER 2012 – REVISED DECEMBER 2012
www.ti.com
CURRENT REFERENCE (IREF PIN) SHORT FLAG (ISF)
The ISF function indicates that the IREF terminal is shorted with low impedance to GND. The ISF bit in the SID is
set to '1' during this condition. Then all outputs, OUTn, are forced off. See Table 15 for the ISF truth table.
PRE-THERMAL WARNING (PTW)
The PTW function indicates that the device junction temperature is high. The PTW in the SID is set to '1' while
the device junction temperature exceeds the temperature threshold (T_PTW = +138°C, typ); however, the outputs
are not forced off. When the PTW is set, the device temperature should be reduced by lowering the power
dissipated in it to avoid a forced shutdown by the thermal shutdown circuit. This reduction can be accomplished
by lowering the GS or BC data values. When the device junction temperature drops below the T_PTW temperature,
the PTW bit in the SID is set to '0'. Figure 34 shows a timing diagram; see Table 15 for the PTW truth table.
LAT
SCLK
First GS Data Latch
(Internal)
Old Latched GS Data
New Latched GS Data
Common Shift Register
(Internal)
BLANK Bit
in First Control Data Latch
(Internal)⁽¹⁾
GSCLK
'0'
1 2 34
Write Data for First GS Latch
SID Data
4093 4095
4094 4096
123
Device Junction
Temperature (T_J)
PTW in SID
(Internal Data)
TEF in SID
(Internal Data)
T_J < T_PTW
T_J ³ T_PTW
'1'
'0'
See Note (3)
'0'
T_J ³ T_TEF
T_J < T_TEF - T_HYST
See Note (2)
T_J < T_PTW
'1'
See Note (5)
See Note (4)
T_J ³ T_PTW
T_J ³ T_TEF
'1'
'0'
'1'
'0'
OFF
OUTn
ON
OFF
ON
See Note (6)
OFF
(1) This internal signal is reset when LAT is input for a GS write with the display timing reset enabled.
(2) The PTW bit in SID is reset to '0' at the LAT rising edge for a GS data write if the device junction temperature is below t_PTW.
(3) The PTW bit is set to '1' when the device junction temperature is greater than t_PTW.
(4) The TEF bit in SID is reset to '0' at the LAT rising edge for a GS data write if the device junction temperature is below t_TEF.
(5) OUT0 to OUT15 are forced off when T_J exceeds t_TEF. Furthermore, the TEF bit is set to '1' at the same time.
(6) OUT0 to OUT15 are turned on at the first GSCLK rising edge if the device junction temperature is below t_TEF with BLANK set to '0'.
Figure 34. PTW, TEF, and TSD Timing
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