TLC5949 Datasheet, PDF(20/51 Page) Texas Instruments – 16-Channel, 12-Bit, ES-PWM, Full Self-Diagnosis LED Driver for 7-Bit Global BC LED Lamp

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TLC5949 Datasheet, PDF (20/51 Pages) Texas Instruments – 16-Channel, 12-Bit, ES-PWM, Full Self-Diagnosis LED Driver for 7-Bit Global BC LED Lamp

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TLC5949

SBVS219A â DECEMBER 2012 â REVISED DECEMBER 2012

www.ti.com

Table 3 summarizes the GS data values versus the output on-time duty cycle. When the device powers up, the

BLANK bit in the first control data latch is set to '1'. The 193-bit common shift register and the first and second

GS data latches contain random data. Therefore, GS data must be written to the GS latches before the BLANK

bit is set to '0'. All constant-current outputs are off when the BLANK bit is '1'.

GS DATA

DECIMAL

511

512

513

1023

1024

1025

1535

1536

1537

2045

2046

2047

Table 3. Output Duty Cycle and On-Time versus GS Data

HEX

000h

001h

002h

003h

1FFh

200h

201h

3FFh

400h

401h

5FFh

600h

601h

7FDh

7FEh

7FFh

ON-TIME DUTY (%)

0.002

0.003

0.005

12.499

12.500

12.502

24.999

25.000

25.002

37.499

37.501

37.502

49.996

49.998

49.999

GS DATA

DECIMAL

2048

2049

2050

2051

2559

2560

2561

3071

3072

3073

3583

3584

3585

4093

4094

4095

HEX

800h

801h

802h

803h

9FFh

A00h

A01h

BFFh

C00h

C01h

DFFh

E00h

E01h

FFDh

FFEh

FFFh

ON-TIME DUTY (%)

50.001

50.002

50.004

50.005

62.499

62.501

62.502

74.997

74.998

75.000

87.500

87.501

87.503

99.997

99.998

100.000

Conventional PWM Control

In this PWM control, the GS clock is enabled when the BLANK bit is set to '0'. The first GS clock rising edge after

the BLANK bit is set to '0' increments the GS counter by one and switches on all outputs with a non-zero GS

value programmed into the second GS data latch. Each additional GS clock rising edge increases the

corresponding GS counter by one.

The GS counter keeps track of the number of clock pulses from the GS clock inputs. Each output stays on while

the counter is less than or equal to the programmed GS value. Each output turns off at the GS counter value

rising edge when the counter becomes greater than the output GS latch value. Figure 22 illustrates the

conventional PWM operation.

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