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AMC7823_15 Datasheet, PDF (36/55 Pages) Texas Instruments – ANALOG MONITORING AND CONTROL CIRCUIT
AMC7823
SLAS453F – APRIL 2005 – REVISED MARCH 2012
Bit ALR-n of ALR Register
Bit IOMOD-n
in GPIO Register
Bit IOST-n
in GPIO Register
Bit IOST-n
(when reading)
ENABLE
GPIO-n
IOMOD-n = 0, ALR-n Pin
IOMOD-n = 1, Digital I/O Pin
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Figure 52. Pin Structure of GPIO-0, GPIO-1, GPIO-2, and GPIO-3
ANALOG INPUT OUT-OF-RANGE ALARM (See ADC Operation)
The AMC7823 provides out-of-range detection for the first four analog inputs of the group of inputs specified by
the starting and ending addresses [SA3:SA0] and [EA3:EA0], respectively. Figure 53 describes the analog out-of-
range logic. Alarm bits ALR-n in the ALR Register are set to '1' to flag an out-of-range condition. If the nth analog
input is out of the preset range, then bit ALR-n is set to '1'. The nth alarm bit does not necessarily correspond to
input channel address n, however. For example, if [SA3:SA0] and [EA3:EA0] of the ADC Control Register are
0x04 and 0x07, respectively, then the channel address of the first analog input is [0x04] and the corresponding
alarm bit is ALR-0. The address of the fourth input channel is [0x07] and its corresponding alarm bit is ALR-3.
Only the first four analog inputs can be implemented with out-of-range detection. In this example, the addresses
of the first four inputs implemented with out-of-range detection are [0x04], [0x05], [0x06], and [0x07],
respectively. However, if [SA3:SA0] is equal to [0x00] and [EA3:EA0] is equal to [0x07], then the addresses of
the first four are [0x00], [0x01], [0x02] and [0x03].
Threshold-Hi-n
Register
−
(Upper Bound)
+
nth Analog
Input
Bit ALR-n of
ALR Register
Threshold-Low-n
−
Register
+
(Lower Bound)
ALR-0
ALR-1
ALR-2
ALR-3
GALR Pin
ALR-n is always ‘0’ when
Threshold-Low-n is equal to 0
and Threshold-Hi-n is equal to
full-scale of input
NOTE: Threshold-Hi-n must not be smaller than Threshold-Low-n. Otherwise, ALR-n is always '1'.
Figure 53. Analog Out-of-Range Alarm Logic
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