AMC7823_15 Datasheet, PDF (21/55 Pages) Texas Instruments – ANALOG MONITORING AND CONTROL CIRCUIT

AMC7823
www.ti.com
SLAS453F – APRIL 2005 – REVISED MARCH 2012
NOTE: If the ending address is equal to or smaller than the starting address, only the starting address is
accessed. In this case, the operation applies only to the starting address; all remaining data and memory
locations (if any) are ignored. In this manner, a single register may be addressed by setting [EADR4:EADR0] =
00000 or [SADR4:SADR0] ≥ [EADR4:EADR0].
Table 1. Page Addressing
PG1
0
0
1
1
PG0
0
1
0
1
PAGE ADDRESS
0
1
Reserved
Reserved
For example, to read the register with address 0x00 on page 0, the host processor must send the AMC7823 the
command 0x8000; this command specifies a read operation on page 0, address 0. After sending the command,
the host reads one data word. To read the registers 0x02 to 0x07 on page 0 (ADC Data-2 to ADC Data-7), the
host must send 0x8087 first, and then clock six data words sequentially out of the AMC7823. The first data word
is from 0x02, the second from 0x03, and the sixth from 0x07. If the host continues clocking data out after reading
the last location [EADR4:EADR0], the value 0x0000 is output until the operation stops. However, if the host
deactivates SS before reading the last register, the operation is terminated and all remaining registers are
ignored.
Likewise, to load data into the registers with addresses 0x03 to 0x05 on page 1 (DAC-3 Data Register to DAC-5
Data Register), the host sends command 0x10C5 followed sequentially by three data words. The first word is
written into 0x03 of page 1, the second goes to 0x04, and the third goes to 0x05. If the host continues to transfer
data into AMC7823 after writing the last location [EADR4:EADR0], all these data are ignored until the operation
stops. However, if the host deactivates SS before writing the last location, the operation is terminated and all
remaining locations are ignored.
See the AMC7823 Memory Map (Table 2) for details of register locations.
Figure 39 shows an example of a complete data transaction between the host processor and the AMC7823.
SS
SCLK
MOSI
Write Command
1st Data [SADR4:SADR0]
Data Written into AMC7823 Registers
Last Data [EADR4:EADR0]
SS
SCLK
MOSI
MISO ^Hi−Z
Read Command
Don’t Care
1st Data [SADR4:SADR0]
Last Data [EADR4:EADR0]
Hi−Z
Data Read from AMC7823 Registers
Figure 39. Write and Read Operations of the AMC7823 Interface
Copyright © 2005–2012, Texas Instruments Incorporated
Product Folder Link(s): AMC7823
Submit Documentation Feedback
21