AMC7823_15 Datasheet, PDF (24/55 Pages) Texas Instruments – ANALOG MONITORING AND CONTROL CIRCUIT

AMC7823
SLAS453F – APRIL 2005 – REVISED MARCH 2012
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ADC OPERATION (See AMC Status/Configuration Register and ADC Control Register)
Out-of-Range Alarm of
first four inputs being
converted
Out-of-Range
ALARM
To Shifter
Register
Double-Buffered
ADC Data Register
ADC−0
DATA
ADC−0
TMPRY
After conversion of CH-n finished,
ADC-n TMPRY register is updated
immediately.
TMPRY register is a temporary registe. r
All ADC-n DA TA registers are
updated simultaneously when the
conversion of the last channel
selected is completed. (1)
To Shift
Register
ADC−6
DATA
ADC−7
DATA
ADC−6
TMPRY
ADC−7
TMPRY
CMOD of ADC Control Register defines
conversion mode.
For Direct-Mode (CMOD = 0), each channel
being converted is accessed one time after
triggered.
For Auto-Mode (CMOD = 1), all channels
being converted are accessed repeatedly
after triggered.
External trigger works in Direct-Mode only.
MUX
CH0
ADC
Bit GREF, effective for
Internal Reference only (2)
0
1
CH3
CH7
CH8
(temperature)
Internal Trigger generated by
Writing ADC Control Register
CONVERT, External
Bit ECNVT
ADC−8
DATA
ADC−8
TMPRY
Bit DAVF, Pin DAV
Bit DAVF and Pin DAV indicate new data available.
After ADC-n Data are Updated, DAVF is set to ‘1’.
Pin DAV Goes Low (Direct-Mode) or Sends 2 ms
Pulse (Auto-Mode). Refer to Figure 42, Figure 43 and
Figure 44.
Bit ECNVT of AMC Status and Configuration Register
selects the trigger signal.
ECNVT = 1, Rising Edge of External CONVERT triggers ADC
ECNVT = 0, Writing ADC Control Register triggers ADC
(1) To avoid conflict, the data are not loaded into ADC-n data register from ADC-n temporary register until the data
transfer from the ADC-n data register to the shift register (if any) finishes.
(2) When the internal reference is selected, the bit GREF determines the input range: GREF = '0', 0 to 2.5V; GREF = '1',
0 to 5V (for 5V supply only). When an external reference is selected, the input range is 0 to 2 × V_REF. The input
cannot be above AV_DD.
Figure 41. ADC Structure
The ADC has nine analog inputs. Channels CH0 through CH7 receive external analog inputs. CH8 is dedicated
to the on-chip temperature sensor (see On-chip Temperature Sensor section).
ADC Trigger Signals (see AMC Status/Configuration Register)
The ADC can be triggered externally (external trigger mode) or internally (internal trigger mode). Bit ECNVT
(Enable CONVERT) of the AMC Status/Configuration Register determines which mode is used. When ECNVT is
set to '1', the ADC works in external trigger mode and the rising edge of the external signal CONVERT initiates
data conversion. When ECNVT is cleared to '0', the ADC is in internal trigger mode, and writing to the ADC
Control Register initiates conversion.
After the ADC is triggered, a group of analog inputs (up to nine channels may be specified) are multiplexed and
each channel is converted. The starting and ending addresses of the group of channels are specified by the bits
[SA3:SA0] and [EA3:EA0], respectively, in the ADC Control Register (see ADC Control Register for details). The
specified channels are converted sequentially from the starting to the ending address according to Table 12
(Analog Input Channel Address Map) and Table 13 (Analog Input Channel Range).
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