TLK2701 Datasheet, PDF (3/21 Pages) Texas Instruments – 1.6 TO 2.7 GBPS TRANSCEIVER

block diagram
LOOPEN
PRBSEN
9
TD0–TD15
TKLSB
9
TKMSB
TLK2701
1.6 TO 2.7 GBPS TRANSCEIVER
SLLS429B – AUGUST 2000 – REVISED MAY 2002
PRBSEN
PRBS
Generator
10
2:1
MUX
10
Parallel to
Serial
10
10
MUX
10
DOUTTXP
DOUTTXN
BIAS
RREF
GTX_CLK
Clock
Synthesizer
TESTEN
ENABLE
PRBSEN
Controls:
PLL,Bias,Rx,
Tx
RKLSB/
PRBS_PASS
2:1
MUX
Interpolator and
Clock Recovery
2:1
MUX
RX_CLK
RDO–RD15
RKMSB
PRBSEN
PRBS
Verification
Recovered
Clock
Comma
Detect
9 _{and 8B/10B} 10
Decoding
Comma
9
Detect
10
and 8B/10B
1:2
MUX
10
Serial to
Parallel
2:1 ^Data
MUX
Decoding
Signal Detect
(LOS)
Figure 1. TLK2701 Block Diagram
Clock
DINRXP
DINRXN
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